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Information for "arm holdings/microarchitectures/neoverse n2"
Basic information
Display title | Neoverse N2 - Microarchitectures - ARM |
Default sort key | Neoverse N2, ARM Holdings |
Page length (in bytes) | 1,293 |
Page ID | 32214 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 1 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 02:16, 14 December 2018 |
Latest editor | David (talk | contribs) |
Date of latest edit | 00:04, 26 April 2021 |
Total number of edits | 12 |
Total number of distinct authors | 4 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (8) | Templates used on this page:
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Facts about "Neoverse N2 - Microarchitectures - ARM"
codename | Zeus + |
designer | ARM Holdings + |
first launched | 2020 + |
full page name | arm holdings/microarchitectures/neoverse n2 + |
instance of | microarchitecture + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Zeus + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |