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Information for "arm holdings/microarchitectures/neoverse n2"

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Display titleNeoverse N2 - Microarchitectures - ARM
Default sort keyNeoverse N2, ARM Holdings
Page length (in bytes)1,293
Page ID32214
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page1
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Edit history

Page creatorDavid (talk | contribs)
Date of page creation01:16, 14 December 2018
Latest editorDavid (talk | contribs)
Date of latest edit23:04, 25 April 2021
Total number of edits12
Total number of distinct authors4
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

Page properties

Transcluded templates (8)

Templates used on this page:

codenameZeus +
designerARM Holdings +
first launched2020 +
full page namearm holdings/microarchitectures/neoverse n2 +
instance ofmicroarchitecture +
manufacturerTSMC +
microarchitecture typeCPU +
nameZeus +
process7 nm (0.007 μm, 7.0e-6 mm) +