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Information for "arm holdings/microarchitectures/arm6"
Basic information
Display title | ARM6 - Microarchitectures - ARM |
Default sort key | ARM6, ARM Holdings |
Page length (in bytes) | 11,477 |
Page ID | 19664 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 2 |
Counted as a content page | Yes |
Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | David (talk | contribs) |
Date of page creation | 10:14, 2 July 2017 |
Latest editor | 190.153.84.27 (talk) |
Date of latest edit | 20:00, 15 May 2024 |
Total number of edits | 40 |
Total number of distinct authors | 5 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |
Page properties
Transcluded templates (20) | Templates used on this page:
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Facts about "ARM6 - Microarchitectures - ARM"
codename | ARM4 + |
core count | 1 +, 4 +, 6 + and 8 + |
designer | ARM Holdings + and 1 + |
full page name | arm holdings/microarchitectures/arm6 + |
instance of | microarchitecture + |
instruction set architecture | ARMv3 +, ARMv6 + and ARMv4 + |
manufacturer | VLSI Technology +, GEC-Plessey Semiconductors + and Sharp + |
microarchitecture type | CPU + |
name | ARM4 + |
phase-out | 0202 JL + |
pipeline stages | 3 + |
pipeline stages (min) | 12 + |
process | 800 nm (0.8 μm, 8.0e-4 mm) + |
processing element count | 2 +, 4 +, 6 + and 8 + |