Semiconductor & Computer Engineering
From WikiChip
Information for "apm/microarchitectures/shadowcat"
Basic information
| Display title | Shadowcat - Microarchitectures - AppliedMicro |
| Default sort key | Shadowcat, AppliedMicro |
| Page length (in bytes) | 583 |
| Page ID | 31401 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 2 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 20:17, 25 September 2018 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 20:17, 25 September 2018 |
| Total number of edits | 1 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (8) | Templates used on this page: |
Facts about "Shadowcat - Microarchitectures - AppliedMicro"
| codename | Shadowcat + |
| core count | 8 + |
| designer | AppliedMicro + |
| first launched | 2013 + |
| full page name | apm/microarchitectures/shadowcat + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Shadowcat + |
| process | 28 nm (0.028 μm, 2.8e-5 mm) + |