Semiconductor & Computer Engineering
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Information for "amd/epyc/7f52"
Basic information
| Display title | EPYC 7F52 - AMD |
| Default sort key | EPYC 7F52, AMD |
| Page length (in bytes) | 3,474 |
| Page ID | 36012 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 4 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | David (talk | contribs) |
| Date of page creation | 21:40, 14 April 2020 |
| Latest editor | David (talk | contribs) |
| Date of latest edit | 10:06, 15 April 2020 |
| Total number of edits | 4 |
| Total number of distinct authors | 1 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (19) | Templates used on this page:
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Facts about "EPYC 7F52 - AMD"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC 7F52 - AMD#pcie + |
| base frequency | 3,500 MHz (3.5 GHz, 3,500,000 kHz) + |
| clock multiplier | 35 + |
| core count | 16 + |
| core family | 23 + |
| core name | Rome + |
| designer | AMD + |
| die count | 9 + |
| family | EPYC + |
| first announced | April 14, 2020 + |
| first launched | April 14, 2020 + |
| full page name | amd/epyc/7f52 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has amd amd-v technology | true + |
| has amd amd-vi technology | true + |
| has amd precision boost 2 | true + |
| has amd secure encrypted virtualization technology | true + |
| has amd secure memory encryption technology | true + |
| has amd sensemi technology | true + |
| has amd transparent secure memory encryption technology | true + |
| has ecc memory support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, SenseMI Technology + and Precision Boost 2 + |
| has locked clock multiplier | true + |
| has simultaneous multithreading | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| is multi-chip package | true + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
| l3$ size | 256 MiB (262,144 KiB, 268,435,456 B, 0.25 GiB) + |
| ldate | April 14, 2020 + |
| manufacturer | TSMC + and GlobalFoundries + |
| market segment | Server + |
| max cpu count | 2 + |
| max memory | 4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) + |
| max memory bandwidth | 190.7 GiB/s (195,276.8 MiB/s, 204.763 GB/s, 204,762.566 MB/s, 0.186 TiB/s, 0.205 TB/s) + |
| max memory channels | 8 + |
| microarchitecture | Zen 2 + |
| model number | 7F52 + |
| name | EPYC 7F52 + |
| package | FCLGA-4094 + and SP3 + |
| part number | 100-000000140 + and 100-000000140WOF + |
| part of | Frequency-optimized SKUs + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 3,100.00 (€ 2,790.00, £ 2,511.00, ¥ 320,323.00) + |
| release price (tray) | $ 3,100.00 (€ 2,790.00, £ 2,511.00, ¥ 320,323.00) + |
| series | 7002 + |
| smp max ways | 2 + |
| socket | LGA-4094 + and SP3 + |
| supported memory type | DDR4-3200 + |
| tdp | 240 W (240,000 mW, 0.322 hp, 0.24 kW) + |
| technology | CMOS + |
| thread count | 32 + |
| turbo frequency | 3,900 MHz (3.9 GHz, 3,900,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |