Revision history of "intel/xeon e5/e5-4610 v4"

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(cur | prev) 11:47, 2 November 2016‎ David (talk | contribs)‎ . . (2,581 bytes) (+2,581)‎ . . (Created page with "{{intel title|Xeon E5-4610 v4}} {{mpu | name = Xeon E5-4610 v4 | no image = Yes | image = | image size = | caption...")

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon E5-4610 v4 - Intel#io +
base frequency	1,800 MHz (1.8 GHz, 1,800,000 kHz) +
bus links	2 +
bus rate	6,400 MT/s (6.4 GT/s, 6,400,000 kT/s) +
bus speed	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
bus type	QPI +
chipset	C610 Series +
clock multiplier	18 +
core count	10 +
core family	6 +
core model	4F +
core name	Broadwell EP +
core stepping	M0 +
core voltage	1.82 V (18.2 dV, 182 cV, 1,820 mV) +
cpuid	406F1 +
designer	Intel +
die area	246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) +
family	Xeon E5 +
first announced	June 20, 2016 +
first launched	June 20, 2016 +
full page name	intel/xeon e5/e5-4610 v4 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has extended page tables support	true +
has feature	Trusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technology	true +
has intel trusted execution technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
io voltage	1.2 V (12 dV, 120 cV, 1,200 mV) +
io voltage tolerance	3% +
isa	x86-64 +
isa family	x86 +
l1d$ description	8-way set associative +
l1d$ size	320 KiB (327,680 B, 0.313 MiB) +
l1i$ description	8-way set associative +
l1i$ size	320 KiB (327,680 B, 0.313 MiB) +
l2$ description	8-way set associative +
l2$ size	2.5 MiB (2,560 KiB, 2,621,440 B, 0.00244 GiB) +
l3$ description	20-way set associative +
l3$ size	25 MiB (25,600 KiB, 26,214,400 B, 0.0244 GiB) +
ldate	June 20, 2016 +
manufacturer	Intel +
market segment	Server +
max case temperature	352.15 K (79 °C, 174.2 °F, 633.87 °R) +
max cpu count	4 +
max memory	1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) +
max pcie lanes	40 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Broadwell +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	E5-4610 v4 +
name	Xeon E5-4610 v4 +
part number	CM8066002062800 +
platform	Grantley EP 4S +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 1,219.00 (€ 1,097.10, £ 987.39, ¥ 125,959.27) +
s-spec	SR2SE +
s-spec (qs)	QKSU +
series	E5-4000 +
smp max ways	4 +
tdp	105 W (105,000 mW, 0.141 hp, 0.105 kW) +
technology	CMOS +
thread count	20 +
transistor count	3,200,000,000 +
word size	64 bit (8 octets, 16 nibbles) +

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