From WikiChip
Revision history of "intel/celeron/n3450"
View logs for this page

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

Retrieved from "https://en.wikichip.org/wiki/intel/celeron/n3450"
Facts about "Celeron N3450 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron N3450 - Intel#io +
base frequency1,100 MHz (1.1 GHz, 1,100,000 kHz) +
clock multiplier11 +
core count4 +
core nameApollo Lake +
core steppingB0 + and B1 +
designerIntel +
device id0x5A85 +
familyCeleron +
first announcedAugust 30, 2016 +
first launchedAugust 30, 2016 +
full page nameintel/celeron/n3450 +
has extended page tables supporttrue +
has featureintegrated gpu +, Trusted Execution Technology +, Advanced Encryption Standard Instruction Set Extension +, Burst Performance Technology +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel burst performance technologytrue +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 500 +
integrated gpu base frequency200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu max frequency700 MHz (0.7 GHz, 700,000 KHz) +
integrated gpu max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
l1d$ description6-way set associative +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ descriptionNo L3$ +
l3$ size0 MiB (0 KiB, 0 B, 0 GiB) +
ldateAugust 30, 2016 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max pcie lanes6 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureGoldmont +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberN3450 +
nameCeleron N3450 +
part numberFH8066802979803 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-specSR2YA + and SR2Z6 +
sdp4 W (4,000 mW, 0.00536 hp, 0.004 kW) +
seriesN Series +
smp max ways1 +
tdp6 W (6,000 mW, 0.00805 hp, 0.006 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)2,200 MHz (2.2 GHz, 2,200,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +