Revision history of "cavium/thunderx2/cn9980"

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Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	ThunderX2 CN9980 - Cavium#pcie +
base frequency	2,000 MHz (2 GHz, 2,000,000 kHz) +, 2,100 MHz (2.1 GHz, 2,100,000 kHz) +, 2,200 MHz (2.2 GHz, 2,200,000 kHz) +, 2,300 MHz (2.3 GHz, 2,300,000 kHz) +, 2,400 MHz (2.4 GHz, 2,400,000 kHz) + and 2,500 MHz (2.5 GHz, 2,500,000 kHz) +
core count	32 +
designer	Cavium +
family	ThunderX2 +
first announced	May 7, 2018 +
first launched	May 7, 2018 +
full page name	cavium/thunderx2/cn9980 +
has ecc memory support	true +
instance of	microprocessor +
isa	ARMv8.1 +
isa family	ARM +
l1$ size	2,048 KiB (2,097,152 B, 2 MiB) +
l1d$ description	8-way set associative +
l1d$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l1i$ description	8-way set associative +
l1i$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l2$ description	8-way set associative +
l2$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ size	32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) +
ldate	May 7, 2018 +
manufacturer	TSMC +
market segment	Server +
max cpu count	2 +
max memory	2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth	158.95 GiB/s (162,764.8 MiB/s, 170.671 GB/s, 170,671.263 MB/s, 0.155 TiB/s, 0.171 TB/s) +
max memory channels	8 +
max sata ports	2 +
max usb ports	2 +
microarchitecture	Vulcan +
model number	CN9980 +
name	ThunderX2 CN9980 +
package	FCLGA-4077 +
part number	CN9980-2500LG4077-Y21-G +, CN9980-2400LG4077-Y21-G +, CN9980-2300LG4077-Y21-G +, CN9980-2200LG4077-Y21-G +, CN9980-2100LG4077-Y21-G + and CN9980-2000LG4077-Y21-G +
process	16 nm (0.016 μm, 1.6e-5 mm) +
smp max ways	2 +
supported memory type	DDR4-2666 +
technology	CMOS +
thread count	128 +
word size	64 bit (8 octets, 16 nibbles) +

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