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Retrieved from "https://en.wikichip.org/wiki/cavium/octeon_tx/cn8020"
Facts about "CN8020 - Cavium"
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base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
core count2 +
designerCavium +
familyOCTEON TX +
full page namecavium/octeon tx/cn8020 +
has ecc memory supporttrue +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for tcp packet processingtrue +
instance ofmicroprocessor +
isaArmV8 +
isa familyARM +
l1$ size208 KiB (212,992 B, 0.203 MiB) +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ size144 KiB (147,456 B, 0.141 MiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate1900 +
market segmentStorage +
max cpu count1 +
microarchitectureArmv8.1 +
nameOcteon TX CN8020 +
seriesCN80xx +
smp max ways1 +
supported memory typeDDR3/4-2100 +
technologyCMOS +
thread count2 +
word size64 bit (8 octets, 16 nibbles) +