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Octeon TX CN8020
General Info
Designer	Cavium
Market	Storage
General Specs
Family	OCTEON TX
Series	CN80xx
Frequency	1,500MHz
Microarchitecture
ISA	ArmV8 (ARM)
Microarchitecture	Armv8.1
Technology	CMOS
Word Size	64 bit
Cores	2
Threads	2
Max Memory	16GB
Multiprocessing
Max SMP	1-Way (Uniprocessor)

CN8020 is a 64-bit dual-core ARM processor designed by Cavium. This processor, which incorporates 2 thunderx1 cores. This MPU includes a number of hardware accelerators specifically for improving the performance of storage and network software such as networking, TCP & QoS, and crypto acceleration.

Cache

Main articles: cavium/microarchitectures/thunderx1 and Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 208KiB 212,992 B 0.203 MiB L1I$ 144KiB 147,456 B 0.141 MiB 2x72 KiB     L1D$ 64 KiB 65,536 B 0.0625 MiB 2x32 KiB     L2$ 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB     1x1 MiB

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3/4-2100 Supports ECC Yes Max Mem 16GB Controllers 1 Width 72bit

Expansions

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	Expansion Options

Networking

Interface options:

[Edit/Modify Network Info]

	Networking

Hardware Accelerators

[Edit/Modify Accelerators Info]

	Hardware Accelerators
	Networking TCP Yes QoS Yes

Datasheet

• CN80XX/CN81XX Processors Product Brief