Revision history of "cavium/microarchitectures/cnmips"

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(cur | prev) 19:38, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (6,686 bytes) (+1)‎ . . (Bot: corrected mem) (undo)
(cur | prev) 17:19, 28 May 2017‎ David (talk | contribs)‎ . . (6,685 bytes) (+22)‎ . . (undo)
(cur | prev) 14:48, 29 December 2016‎ ChipIt (talk | contribs)‎ . . (6,663 bytes) (+187)‎ . . (undo)
(cur | prev) 14:43, 29 December 2016‎ ChipIt (talk | contribs)‎ . . (6,476 bytes) (+119)‎ . . (→‎Process Technology) (undo)
(cur | prev) 20:51, 11 December 2016‎ ChipIt (talk | contribs)‎ . . (6,357 bytes) (+510)‎ . . (→‎All cnMIPS Chips) (undo)
(cur | prev) 20:44, 11 December 2016‎ ChipIt (talk | contribs)‎ . . (5,847 bytes) (+79)‎ . . (→‎Codenames) (undo)
(cur | prev) 06:07, 10 December 2016‎ ChipIt (talk | contribs)‎ . . (5,768 bytes) (+20)‎ . . (→‎Architecture) (undo)
(cur | prev) 06:06, 10 December 2016‎ ChipIt (talk | contribs)‎ . . (5,748 bytes) (+41)‎ . . (→‎Architecture) (undo)
(cur | prev) 06:01, 10 December 2016‎ ChipIt (talk | contribs)‎ . . (5,707 bytes) (+110)‎ . . (→‎Special Functional Units) (undo)
(cur | prev) 05:18, 9 December 2016‎ ChipIt (talk | contribs)‎ . . (5,597 bytes) (+28)‎ . . (→‎All cnMIPS Chips) (undo)
(cur | prev) 21:25, 8 December 2016‎ ChipIt (talk | contribs)‎ . . (5,569 bytes) (+46)‎ . . (→‎All cnMIPS Chips) (undo)
(cur | prev) 16:39, 8 December 2016‎ ChipIt (talk | contribs)‎ . . (5,523 bytes) (+1,119)‎ . . (undo)
(cur | prev) 06:41, 8 December 2016‎ ChipIt (talk | contribs)‎ . . (4,404 bytes) (+9)‎ . . (→‎Memory Hierarchy) (undo)
(cur | prev) 18:12, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,395 bytes) (-24)‎ . . (undo)
(cur | prev) 18:12, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,419 bytes) (+96)‎ . . (undo)
(cur | prev) 18:10, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,323 bytes) (0)‎ . . (→‎Process Technology) (undo)
(cur | prev) 18:10, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,323 bytes) (+194)‎ . . (undo)
(cur | prev) 17:25, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,129 bytes) (+7)‎ . . (undo)
(cur | prev) 02:05, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,122 bytes) (-45)‎ . . (undo)
(cur | prev) 01:39, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (4,167 bytes) (+698)‎ . . (undo)
(cur | prev) 00:43, 7 December 2016‎ ChipIt (talk | contribs)‎ . . (3,469 bytes) (+1,400)‎ . . (undo)
(cur | prev) 23:39, 6 December 2016‎ ChipIt (talk | contribs)‎ . . (2,069 bytes) (+1,810)‎ . . (undo)
(cur | prev) 22:11, 6 December 2016‎ ChipIt (talk | contribs)‎ . . (259 bytes) (+259)‎ . . (Created page with "{{cavium title|cnMIPS|arch}} '''cnMIPS''' or '''cnMIPS64''' is a microarchitecture implementing the {{mips|MIPS64}} ISA designed by Cavium for their {{cavium|Octeon}}...")

codename	cnMIPS +
core count	2 + and 4 +
designer	Cavium +
first launched	September 13, 2004 +
full page name	cavium/microarchitectures/cnmips +
instance of	microarchitecture +
instruction set architecture	MIPS64 +
manufacturer	TSMC +
microarchitecture type	CPU +
name	cnMIPS +
pipeline stages	5 +
process	130 nm (0.13 μm, 1.3e-4 mm) +

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