Revision history of "arm holdings/microarchitectures/neoverse n2"

Diff selection: Mark the radio boxes of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

(cur | prev) 22:56, 23 March 2025‎ 95.24.51.108 (talk)‎ . . (4,008 bytes) (+93)‎ . . (fixed) (undo)
(cur | prev) 17:55, 23 March 2025‎ 95.24.51.108 (talk)‎ . . (3,915 bytes) (+2,622)‎ . . (add tables) (undo)
(cur | prev) 00:04, 26 April 2021‎ David (talk | contribs)‎ . . (1,293 bytes) (+3)‎ . . (undo)
(cur | prev) 21:18, 25 April 2021‎ David (talk | contribs)‎ m . . (1,290 bytes) (0)‎ . . (David moved page arm holdings/microarchitectures/zeus to arm holdings/microarchitectures/neoverse n2) (undo)
(cur | prev) 21:18, 25 April 2021‎ David (talk | contribs)‎ . . (1,290 bytes) (+36)‎ . . (undo)
(cur | prev) 23:03, 23 March 2020‎ David (talk | contribs)‎ m . . (1,254 bytes) (+1,254)‎ . . (Reverted edits by 87.98.233.150 (talk) to last revision by 84.147.94.205) (undo)
(cur | prev) 18:48, 23 March 2020‎ 87.98.233.150 (talk)‎ . . (empty) (-1,254)‎ . . (Blanked the page) (undo)
(cur | prev) 04:36, 29 August 2019‎ 84.147.94.205 (talk)‎ . . (1,254 bytes) (0)‎ . . (Ares → Zeus) (undo)
(cur | prev) 10:29, 3 June 2019‎ David (talk | contribs)‎ m . . (1,254 bytes) (-43)‎ . . (Reverted edits by 47.187.169.114 (talk) to last revision by David) (undo)
(cur | prev) 08:04, 3 June 2019‎ 47.187.169.114 (talk)‎ . . (1,297 bytes) (+43)‎ . . (undo)
(cur | prev) 18:21, 15 December 2018‎ David (talk | contribs)‎ . . (1,254 bytes) (-2)‎ . . (undo)
(cur | prev) 18:20, 15 December 2018‎ David (talk | contribs)‎ . . (1,256 bytes) (+19)‎ . . (undo)
(cur | prev) 18:18, 15 December 2018‎ David (talk | contribs)‎ . . (1,237 bytes) (+600)‎ . . (undo)
(cur | prev) 02:16, 14 December 2018‎ David (talk | contribs)‎ . . (637 bytes) (+637)‎ . . (zeus)

codename	Neoverse N2 +
core count	4 +, 8 +, 16 +, 32 +, 64 +, 96 + and 128 +
designer	ARM Holdings +
first launched	September 22, 2020 +
full page name	arm holdings/microarchitectures/neoverse n2 +
instance of	microarchitecture +
instruction set architecture	ARMv9.0-A +
manufacturer	TSMC +
microarchitecture type	CPU +
name	Neoverse N2 +
pipeline stages	13 +
process	7 nm (0.007 μm, 7.0e-6 mm) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung