Editing nec/vector engine/type 10b

{{nec title|Vector Engine Type 10B}}
{{chip
|name=VE Type 10B
|image=nec ve type 10 (front).jpg
|designer=NEC
|manufacturer=TSMC
|model number=Type 10B
|market=Server
|market 2=Workstation
|first announced=Oct 26, 2017
|first launched=2018
|family=Vector Engine
|series=Type 10
|frequency=1,400 MHz
|microarch=SX-Aurora
|platform=SX-Aurora TSUBASA
|process=16 nm
|transistors=4,800,000,000
|technology=CMOS
|die area=493.68 mm²
|die length=14.96 mm
|die width=33.00 mm
|word size=64 bit
|core count=8
|thread count=8
|max memory=48 GiB
|successor=Type 10BE
|successor link=nec/vector_engine/type_10be
}}
'''Vector Engine Type 10B''' is an [[octa-core]] [[vector processor]] designed by [[NEC]] and introduced in late 2017. This chip is fabricated on TSMC [[16 nm process]] based on the {{nec|SX-Aurora|l=arch}} mircoarchitecture. VE Type 10B operates at 1.4 GHz and comes with 48 GiB of six 8-hi stacks of [[HBM2]] memory.

== Performance ==
The Vector Engine Type 10B operates at 1.4 GHz and integrates {{nec|SX-Aurora|eight vector cores|l=arch}}.

* Per core: 269 [[gigaFLOPS]]
* Per chip: [[peak flops (double-precision)::2.15 teraFLOPS]]

== Cache ==
{{main|nec/microarchitectures/sx-aurora#Memory_Hierarchy|l1=SX-Aurora § Cache}}
{{cache size
|l1 cache=512 KiB
|l1i cache=256 KiB
|l1i break=8x32 KiB
|l1d cache=256 KiB
|l1d break=8x32 KiB
|l2 cache=2 MiB
|l2 break=8x256 KiB
|l3 cache=16 MiB
|l3 break=8x2 MiB
}}

== Memory controller ==
{{memory controller
|type=HBM2-1600
|ecc=No
|max mem=48 GiB
|controllers=6
|channels=48
|width=1024 bit
|max bandwidth=1,229 GB/s
|frequency=800 MHz
}}

== Expansions ==
{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=3.0
|pcie lanes=16
|pcie config=1x16
}}
}}

== Card ==
The Vector Engine Type 10B supports water cooling or air cooling options.


'''Water cooled:'''

:[[File:nec vector engine type 10 water cooled model.jpg|800px]]

'''Air cooled:'''

:[[File:nec vector engine type 10 air cooled model.jpg|800px]]
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Vector Engine Type 10B - NEC#pcie +
base frequency	1,400 MHz (1.4 GHz, 1,400,000 kHz) +
core count	8 +
designer	NEC +
die area	493.68 mm² (0.765 in², 4.937 cm², 493,680,000 µm²) +
die length	14.96 mm (1.496 cm, 0.589 in, 14,960 µm) +
die width	33 mm (3.3 cm, 1.299 in, 33,000 µm) +
family	Vector Engine +
first announced	October 26, 2017 +
first launched	2018 +
full page name	nec/vector engine/type 10b +
has ecc memory support	false +
instance of	microprocessor +
l1$ size	512 KiB (524,288 B, 0.5 MiB) +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) +
l2$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ size	16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
ldate	2018 +
main image	+
manufacturer	TSMC +
market segment	Server + and Workstation +
max memory	49,152 MiB (50,331,648 KiB, 51,539,607,552 B, 48 GiB, 0.0469 TiB) +
max memory bandwidth	1,144.595 GiB/s (1,172,065.735 MiB/s, 1,229 GB/s, 1,229,000 MB/s, 1.118 TiB/s, 1.229 TB/s) +
max memory channels	48 +
microarchitecture	SX-Aurora +
model number	Type 10B +
name	VE Type 10B +
peak flops (double-precision)	2,150,000,000,000 FLOPS (2,150,000,000 KFLOPS, 2,150,000 MFLOPS, 2,150 GFLOPS, 2.15 TFLOPS, 0.00215 PFLOPS, 2.15e-6 EFLOPS, 2.15e-9 ZFLOPS) +
platform	SX-Aurora TSUBASA +
process	16 nm (0.016 μm, 1.6e-5 mm) +
series	Type 10 +
supported memory type	HBM2-1600 +
technology	CMOS +
thread count	8 +
transistor count	4,800,000,000 +
word size	64 bit (8 octets, 16 nibbles) +