Editing marvell/armada/610

{{marvell title|ARMADA 610}}
{{chip
| name                = ARMADA 610
| no image            = Yes
| image               = 
| image size          = 
| caption             = 
| designer            = Marvell
| manufacturer        = TSMC
| model number        = 610
| part number         = 88AP610
| part number 2       = 
| part number 3       = 
| part number 4       = 
| market              = Mobile
| first announced     = October 19, 2009
| first launched      = January 5, 2010
| last order          = 
| last shipment       = 
| release price       = 

| family              = ARMADA 600
| series              = 600
| locked              = 
| frequency           = 1,000 MHz

| isa family          = ARM
| isa                 = ARMv6
| isa 2               = ARMv5
| microarch           = Sheeva PJ4
| platform            = ARMADA
| core name           = Sheeva PJ4
| core family         = 
| core model          = 
| process             = 55 nm
| transistors         = 
| technology          = 
| die area            = 
| die width           = 
| die length          = 
| word size           = 32 bit
| core count          = 1
| thread count        = 1
| max cpus            = 1
| max memory          = 2 GiB


| power               = 
| average power       = 
| idle power          = 
| v core              = 
| v core tolerance    = 
| v core min          = 
| v core max          = 
| v io                = 1.5 V
| v io tolerance      = 0.3 V
| v io 2              = 3.0 V
| v io 3              = 3.3 V
| sdp                 = 
| tdp                 = 
| tdp typical         = 
| ctdp down           = 
| ctdp down frequency = 
| ctdp up             = 
| ctdp up frequency   = 
| temp min            = 
| temp max            = 
| tjunc min           = <!-- °C -->
| tjunc max           = 
| tcase min           = 
| tcase max           = 
| tstorage min        = 
| tstorage max        = 
| tambient min        = 
| tambient max        = 

| packaging           = Yes
| package 0           = FCCBGA-640
| package 0 type      = FCCBGA
| package 0 pins      = 640
| package 0 pitch     = 0.65 mm
| package 0 width     = 21 mm
| package 0 length    = 21 mm
}}
'''ARMADA 610''' was a {{arch|32}} [[ARM]] microprocessor introduced by [[Marvell]] in 2010. This processor, which is based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture, operated at 1 GHz and supported up to 2 GiB of DDR3-1066 memory. The ARMADA 610 also integrated a [[Vivante]] {{vivante|GC860}} [[IGP]] as well as an [[EPD]] display controller which eliminates page turn lag.

== Cache ==
{{main|intel/microarchitectures/sheeva pj4#Memory_Hierarchy|l1=Sheeva PJ4 § Cache}}
{{cache size
|l1 cache=64 KiB
|l1i cache=32 KiB
|l1i break=1x32 KiB
|l1d cache=32 KiB
|l1d break=1x32 KiB
|l2 cache=256 KiB
|l2 break=1x256 KiB
}}

== Memory controller ==
{{memory controller
|type=DDR3-1066
|type 2=DDR2-800
|ecc=No
|max mem=2 GiB
|controllers=1
|channels=1
|max bandwidth=7.942 GiB/s
|bandwidth schan=7.942 GiB/s
}}

=== Static Memory Controller ===
* 4 chip selects, up to 256 MB each
*  Asynch/Sync operation up to 78 MHz
* A/D and AA/D Mode, x8 & x16 NOR Flash interface
* Support for VLIO or companion chips 

===NAND Flash Controller===
* ONFI compliant controller supporting SLC and MLC NAND, x8 & x16, small block and large block
* 2 Chip Selects with up to 64GB of address space
* Support for 2 KB and 4 KB page sizes
* 2-bit detect/1-bit correct ECC & 16-bit correct BCH 

=== MMC, SD and SDIO Controller===
* 4x MMC/SD/SDIO/CE-ATA Controllers
* Supports MMC/eMMC v4.2, 4.3 and 4.4
* SDIO v 2.0, SDcard v2.1 and v3.0 (UHS-I)
* CE-ATA 1/4/8-Bit, SPI mode and boot suppor

== Expansions ==
{{expansions
|usb revision=2.0
|usb ports=3
|usb extra=2x HSIC, 1x FSIC/12pin ULPI
|uart=Yes
|uart ports=4
|jtag=Yes
|i2c=Yes
|i2c ports=6
}}

== Graphics ==
The 618 incorporates a Vivante {{vivante|GC860}} [[GPU]] capable of 45 million triangle strips per second, 250 Mpixel/s fill rate.

{{integrated graphics
| gpu                 = GC860
| device id           = 
| designer            = Vivante
| execution units     = 
| max displays        = 
| max memory          = 
| frequency           = ? MHz
| max frequency       = 

| output crt          = 
| output sdvo         = 
| output dsi          = Yes
| output edp          = 
| output dp           = 
| output hdmi         = Yes
| output vga          = 
| output dvi          = 

| directx ver        = 11
| opengl ver         = 3.0
| opencl ver         = 1.1
| opengl es ver      = 2.0
| hdmi ver           = 
| dp ver             = 
| edp ver            = 
| max res hdmi       = 1920x1080
| max res hdmi freq  = 
| max res dp         = 
| max res dp freq    = 
| max res edp        = 
| max res edp freq   = 
| max res vga        = 
| max res vga freq   = 
| max res dsi        = 1920x1080
| max res dsi freq   = 
}}

* 1080p decode support for H.264 high profile, VC-1/WMV, MPEG-4, MPEG-2, H.263, On-2.
* 1080p encode support for h.264 high profile, MPEG-4, MPEG-2, H.263 and On-2.

== Hardware Accelerators ==
=== Marvell Wireless Trusted Module v3 ===
* Hashing units: MD5, SHA-1, HMAC-SHA-1; SHA-224/SHA256 and HMAC, SHA-512 and HMAC, MD5 and HMAC-MD5
* Symmetric crypto: AES (128 to 256 & ECB, CBC, CTR/XTS modes), DES/3DES (ECB & CBC), RC4
* Asymmetric crypto: ECC (Prime field ECC, FIPS std curve EC-224/256, EC-DSA) & RSA (RSA key gen, PKCS#1 v1.5/v2.1 Digital Signatures, x.509 Digital Certificate), & DiffieHellman Key exchange. True HW RNG, FIPS 140-2 certification

== Features ==
{{arm features
|thumb=No
|thumb2=No
|thumbee=No
|vfpv1=No
|vfpv2=No
|vfpv3=No
|vfpv3-d16=Yes
|vfpv3-f16=No
|vfpv4=No
|vfpv4-d16=No
|vfpv5=No
|neon=No
|wmmx=Yes
|wmmx2=Yes
}}

== Block Diagram ==
[[File:armada 610 block.png|800px]]

== Documents ==
* [[:File:armada610 pb.pdf|ARMADA 610 Product Brief]]
* [[:File:armada610overview.pdf|ARMADA 610 Overview]]
base frequency	1,000 MHz (1 GHz, 1,000,000 kHz) +
core count	1 +
core name	Sheeva PJ4 +
designer	Marvell +
family	ARMADA 600 +
first announced	October 19, 2009 +
first launched	January 5, 2010 +
full page name	marvell/armada/610 +
has ecc memory support	false +
instance of	microprocessor +
integrated gpu	GC860 +
integrated gpu designer	Vivante +
io voltage	1.5 V (15 dV, 150 cV, 1,500 mV) +, 3 V (30 dV, 300 cV, 3,000 mV) + and 3.3 V (33 dV, 330 cV, 3,300 mV) +
io voltage tolerance	0.3 V +
isa	ARMv5 + and ARMv6 +
isa family	ARM +
l1$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1d$ size	32 KiB (32,768 B, 0.0313 MiB) +
l1i$ size	32 KiB (32,768 B, 0.0313 MiB) +
l2$ size	0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate	January 5, 2010 +
manufacturer	TSMC +
market segment	Mobile +
max cpu count	1 +
max memory	2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max memory bandwidth	7.942 GiB/s (8,132.608 MiB/s, 8.528 GB/s, 8,527.658 MB/s, 0.00776 TiB/s, 0.00853 TB/s) +
max memory channels	1 +
microarchitecture	Sheeva PJ4 +
model number	610 +
name	ARMADA 610 +
part number	88AP610 +
platform	ARMADA +
process	55 nm (0.055 μm, 5.5e-5 mm) +
series	600 +
smp max ways	1 +
supported memory type	DDR2-800 + and DDR3-1066 +
thread count	1 +
word size	32 bit (4 octets, 8 nibbles) +