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{{hisilicon title|K3V1}}
 
{{hisilicon title|K3V1}}
{{chip
+
{{mpu
 
|name=K3V1
 
|name=K3V1
 
|no image=Yes
 
|no image=Yes
 
|designer=HiSilicon
 
|designer=HiSilicon
|designer 2=ARM Holdings
 
 
|manufacturer=TSMC
 
|manufacturer=TSMC
 
|model number=K3V1
 
|model number=K3V1
Line 24: Line 23:
 
|thread count=1
 
|thread count=1
 
|max cpus=1
 
|max cpus=1
|v io=1.8 V
 
|v io 2=2.5 V
 
 
|package module 1={{packages/hisilicon/tfbga-460}}
 
|package module 1={{packages/hisilicon/tfbga-460}}
 
}}
 
}}
 
'''K3V1''' is a {{arch|32}} performance [[ARM]] microprocessor introduced by [[HiSilicon]] in [[2008]]. This chip incorporates a [[single core|single]] {{armh|ARM9}} core with {{arm|Jazelle}} support operating at 460 MHz (although later models might have supported higher frequency). This chip supports 32-bit or 16-bit DDR memory.
 
'''K3V1''' is a {{arch|32}} performance [[ARM]] microprocessor introduced by [[HiSilicon]] in [[2008]]. This chip incorporates a [[single core|single]] {{armh|ARM9}} core with {{arm|Jazelle}} support operating at 460 MHz (although later models might have supported higher frequency). This chip supports 32-bit or 16-bit DDR memory.
 
== Cache ==
 
{{main|arm holdings/microarchitectures/arm9#Memory_Hierarchy|l1=ARM9 § Cache}}
 
{{cache size
 
|l1 cache = 32 KiB
 
|l1i cache=16 KiB
 
|l1i break=1x16 KiB
 
|l1i desc=4-way set associative
 
|l1d cache=16 KiB
 
|l1d break=1x16 KiB
 
|l1d desc=4-way set associative
 
}}
 
 
== Memory controller ==
 
{{memory controller
 
|type=DDR
 
|controllers=1
 
|channels=1
 
|width=16 bit
 
|width 2=32 bit
 
}}
 
 
== Expansions ==
 
* 4x high-speed UART interfaces
 
* 2x SPI
 
* 2x I2C
 
* USB 2.0 On-The-Go (HS OTG) PHY
 
* USB 1.1
 
* 2x MMC/SD/SDIO interface
 
* 14x GPIOs
 
* 8 Timers
 
 
== Features ==
 
{{arm features
 
|thumb=No
 
|thumb2=No
 
|thumbee=No
 
|vfpv1=No
 
|vfpv2=No
 
|vfpv3=No
 
|vfpv3-d16=No
 
|vfpv3-f16=No
 
|vfpv4=No
 
|vfpv4-d16=No
 
|vfpv5=No
 
|neon=No
 
|trustzone=No
 
|jazelle=Yes
 
|wmmx=No
 
|wmmx2=No
 
}}
 
 
== Graphics ==
 
The K3V1 integrated graphics engine, although the exact specs are not available.
 
 
* Support QVGA, WQVGA, VGA display resolutions
 
* Hardware-acceleration video
 
** Decode: [[MPEG4]], [[H.263]], [[H.264]], and [[VC-1]]
 
*** Rate QCIF/CIF/QVGA/VGA/D1, frame rate up to 30fps
 
** Encode: MPEG4 and H.263 video encoding
 
*** QCIF/CIF/QVGA/VGA, frame rate up to 30fps
 
* 200 KiB Frame Buffer
 
 
== Camera ==
 
* Support 30 million pixel camera, up to 30fps
 
* Supports up to 8 megapixel CMOS Sensor image input
 
 
== Audio ==
 
* Built-in high-performance audio CODEC
 
** Sampling frequency support 44.1kHz and 48kHz
 
** support for sound playback and recording
 
* High quality stereo playback DAC and 1 channel Voice DAC, 2 channels
 
** ADC, CODEC support any audio mixing, independent of the amplifier Output gain control
 
 
== Block Diagram ==
 
[[File:hisilicon k3v1 block.png|700px]]
 
 
== Documents ==
 
* [[:File:k3v1 prod brief.pdf|K3V1 Product Brief]]
 

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Facts about "K3V1 - HiSilicon"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
K3V1 - HiSilicon#package +
base frequency460 MHz (0.46 GHz, 460,000 kHz) +
core count1 +
core nameARM926EJ-S +
designerHiSilicon + and ARM Holdings +
familyK3 +
first announcedJune 2008 +
first launchedJune 2008 +
full page namehisilicon/k3/k3v1 +
has ecc memory supportfalse +
instance ofmicroprocessor +
io voltage1.8 V (18 dV, 180 cV, 1,800 mV) + and 2.5 V (25 dV, 250 cV, 2,500 mV) +
isaARMv5 +
isa familyARM +
l1$ size32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description4-way set associative +
l1d$ size16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description4-way set associative +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
ldateJune 2008 +
manufacturerTSMC +
market segmentMobile +
max cpu count1 +
max memory channels1 +
microarchitectureARM9 +
model numberK3V1 +
nameK3V1 +
packageTFBGA-460 +
part numberHi3611 +
process180 nm (0.18 μm, 1.8e-4 mm) +
smp max ways1 +
supported memory typeDDR +
technologyCMOS +
thread count1 +
transistor count200,000,000 +
word size32 bit (4 octets, 8 nibbles) +