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Latest revision | Your text | ||
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|clock min=2,100 MHz | |clock min=2,100 MHz | ||
|clock max=2,600 MHz | |clock max=2,600 MHz | ||
− | |package name 1=amd, | + | |package name 1=amd,socket_fp5 |
|predecessor=Raven Ridge | |predecessor=Raven Ridge | ||
|predecessor link=amd/cores/raven ridge | |predecessor link=amd/cores/raven ridge | ||
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* {{amd|Precision Boost 2}}, 2-way [[SMT]], {{amd|mXFR}} | * {{amd|Precision Boost 2}}, 2-way [[SMT]], {{amd|mXFR}} | ||
* Graphics | * Graphics | ||
− | ** {{amd|Radeon Vega | + | ** {{amd|Radeon Vega 10}}/{{amd|Radeon Vega 8|8}}/{{amd|Radeon Vega 6|6}}/{{amd|Radeon Vega 3|3}} ({{amd|Vega|l=arch}}) |
** Up to 1.4 GHz | ** Up to 1.4 GHz | ||
Facts about "Picasso - Cores - AMD"
designer | AMD + |
first announced | January 6, 2019 + |
first launched | January 6, 2019 + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | GlobalFoundries + |
microarchitecture | Zen+ + |
name | Picasso + |
package | FP5 + |
process | 12 nm (0.012 μm, 1.2e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |