Editing renesas/r-car/e2 (section)

== Graphics ==
{{integrated graphics
| gpu                 = PowerVR SGX540
| designer            = Imagination Technologies
| execution units     = 1
| max displays        = 2
| frequency           = 260 MHz
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	R-Car E2 - Renesas#package +
base frequency	1,000 MHz (1 GHz, 1,000,000 kHz) + and 780 MHz (0.78 GHz, 780,000 kHz) +
core count	3 +
core name	Cortex-A7 + and SH-4A +
core voltage	1 V (10 dV, 100 cV, 1,000 mV) +
designer	Renesas + and ARM Holdings +
family	R-Car +
first announced	October 22, 2014 +
first launched	June 2016 +
full page name	renesas/r-car/e2 +
has ecc memory support	false +
instance of	microprocessor +
integrated gpu	PowerVR SGX540 +
integrated gpu base frequency	260 MHz (0.26 GHz, 260,000 KHz) +
integrated gpu designer	Imagination Technologies +
integrated gpu execution units	1 +
io voltage	3.3 V (33 dV, 330 cV, 3,300 mV) + and 1.8 V (18 dV, 180 cV, 1,800 mV) +
isa	ARMv7 + and SuperH +
isa family	ARM + and SuperH +
l1$ size	192 KiB (196,608 B, 0.188 MiB) +
l1d$ size	96 KiB (98,304 B, 0.0938 MiB) +
l1i$ size	96 KiB (98,304 B, 0.0938 MiB) +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldate	June 2016 +
main image	+
manufacturer	TSMC +
market segment	Embedded +
max cpu count	1 +
max memory	2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max memory bandwidth	9.93 GiB/s (10,168.32 MiB/s, 10.662 GB/s, 10,662.256 MB/s, 0.0097 TiB/s, 0.0107 TB/s) +
max memory channels	2 +
microarchitecture	Cortex-A7 + and SH-4A +
model number	E2 +
name	R-Car E2 +
package	FCBGA-501 +
part number	R8A7794 +
process	28 nm (0.028 μm, 2.8e-5 mm) +
series	2nd Gen +
smp max ways	1 +
supported memory type	DDR3-1333 +
technology	CMOS +
thread count	3 +
word size	32 bit (4 octets, 8 nibbles) +