From WikiChip
Editing renesas/r-car/h1 (section)

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)
Retrieved from "https://en.wikichip.org/wiki/renesas/r-car/h1"
Facts about "R-Car H1 - Renesas"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
R-Car H1 - Renesas#package + and R-Car H1 - Renesas#io +
base frequency800 MHz (0.8 GHz, 800,000 kHz) + and 1,000 MHz (1 GHz, 1,000,000 kHz) +
core count5 +
core nameCortex-A9 + and SH-4A +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
designerRenesas + and ARM Holdings +
familyR-Car +
first announcedOctober 21, 2011 +
first launchedNovember 2011 +
full page namerenesas/r-car/h1 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuPowerVR SGX543 +
integrated gpu base frequency250 MHz (0.25 GHz, 250,000 KHz) +
integrated gpu designerImagination Technologies +
integrated gpu execution units2 +
io voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
isaARMv7 +
isa familyARM +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description4-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description4-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateNovember 2011 +
main imageFile:r-car h1.png +
manufacturerTSMC +
market segmentEmbedded +
max cpu count1 +
max memory2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max memory bandwidth7.95 GiB/s (8,140.8 MiB/s, 8.536 GB/s, 8,536.248 MB/s, 0.00776 TiB/s, 0.00854 TB/s) +
max memory channels2 +
max pcie lanes1 +
microarchitectureCortex-A9 + and SH-4A +
model numberH1 +
nameR-Car H1 +
packageFCBGA-832 +
part numberR8A77790 +
process40 nm (0.04 μm, 4.0e-5 mm) +
series1st Gen +
smp max ways1 +
supported memory typeDDR3-1066 +
technologyCMOS +
thread count5 +
word size32 bit (4 octets, 8 nibbles) +