Editing amd/embedded/t48l

{{amd title|Embedded G-Series T48L}}
{{chip
|name=Embedded G-Series T48L
|no image=Yes
|designer=AMD
|manufacturer=TSMC
|model number=T48L
|part number=GET48LGBB22GVE
|cpuid=
|market=Embedded
|first launched=March 1, 2011
|last order=2021-Q2
|last shipment=2021-Q4
|family=Embedded G-Series
|series=G-Series APU/CPU
|locked=
|frequency=1,400 MHz
|clock multiplier=14
|isa=x86-64
|isa family=x86
|microarch=Bobcat
|core name=eBrazos
|core family=20
|core model=
|core stepping=
|process=40 nm
|transistors=451,000,000
|technology=CMOS
|die area=75 mm²
|word size=64 bit
|core count=2
|thread count=2
|max cpus=1
|max memory=
|tdp=18 W
|tjunc min=0 °C
|tjunc max=90 °C
|package module 1={{packages/amd/FT1}}
}}
'''T48L''' is a {{arch|64}} [[dual-core]] [[x86]] embedded microprocessor introduced by [[AMD]] in March [[2011]]. This processor is a member of the AMD Embedded G-Series formerly codenamed "{{amd|eBrazos|l=core}}" with CPU cores based on the {{amd|Bobcat|l=arch}} microarchitecture and is fabricated on a [[TSMC]] [[40&nbsp;nm]] process. The T48L operates at a base frequency of 1.4 GHz with a [[TDP]] of 18 W. It supports single-channel DDR3-1066 memory. 

== Cache ==
{{cache size
|l1 cache=128 KiB
|l1i cache=64 KiB
|l1i break=2 × 32 KiB
|l1i desc=2-way set associative
|l1d cache=64 KiB
|l1d break=2 × 32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=1 MiB
|l2 break=2 × 512 KiB
|l2 desc=16-way set associative
|l2 policy=
}}

== Memory controller ==
{{memory controller
|type=DDR3-1066
|ecc=No
|controllers=1
|channels=1
|max bandwidth=8.53 GB/s
}}

== Expansions ==
"eBrazos" processors integrate one 5-port, 8-lane PCIe Gen 1/2 (5 GT/s) controller. Four {{abbr|GPP}} lanes are configurable as up to four x4/x2/x1 wide (e.g. 1x2 + 2x1) links, the remaining four lanes are reserved for a {{abbr|UMI}} link to the chipset. The recommended AMD A50M "Hudson-M1" and A55E "Hudson-E1" controller hubs provide four PCIe Gen 1/2 lanes configurable as up to four x4/x2/x1 links, a 32-bit, 33&nbsp;MHz PCI interface (A55E only), 6 × SATA Gen 1/2/3 (6 Gb/s), 14 × USB 1.1/2.0, 2 × USB 1.1, a Gb Ethernet MAC (A55E), {{abbr|HDA}}, {{abbr|LPC}}, {{abbr|SPI}}, {{abbr|SMBus}}, {{abbr|GPIO}}.

{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=2.0
|pcie lanes=4
|pcie config=1x4/2x2/1x2+2x1/4x1
}}
}}

== Features ==
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=Yes
|nx=
|mmx=Yes
|emmx=
|sse=Yes
|sse2=Yes
|sse3=Yes
|ssse3=Yes
|sse41=No
|sse42=No
|sse4a=Yes
|sse_gfni=No
|avx=No
|avx_gfni=No
|avx2=No
|avx512f=No
|avx512cd=No
|avx512er=No
|avx512pf=No
|avx512bw=No
|avx512dq=No
|avx512vl=No
|avx512ifma=No
|avx512vbmi=No
|avx5124fmaps=No
|avx512vnni=No
|avx5124vnniw=No
|avx512vpopcntdq=No
|avx512gfni=No
|avx512vaes=No
|avx512vbmi2=No
|avx512bitalg=No
|avx512vpclmulqdq=No
|abm=
|tbm=No
|bmi1=No
|bmi2=No
|fma3=No
|fma4=No
|aes=No
|rdrand=No
|sha=No
|xop=No
|adx=No
|clmul=No
|f16c=No
|bfloat16=No
|tbt1=No
|tbt2=No
|tbmt3=No
|tvb=No
|bpt=No
|eist=No
|sst=No
|flex=No
|fastmem=No
|ivmd=No
|intelnodecontroller=No
|intelnode=No
|kpt=No
|ptt=No
|intelrunsure=No
|mbe=No
|isrt=No
|sba=No
|mwt=No
|sipp=No
|att=No
|ipt=No
|tsx=No
|txt=No
|ht=No
|vpro=No
|vtx=No
|vtd=No
|ept=No
|mpx=No
|sgx=No
|securekey=No
|osguard=No
|intqat=No
|dlboost=No
|3dnow=
|e3dnow=
|smartmp=No
|powernow=
|amdvi=
|amdv=Yes
|amdsme=No
|amdtsme=No
|amdsev=No
|rvi=No
|smt=No
|sensemi=No
|xfr=No
|xfr2=
|mxfr=No
|amdpb=No
|amdpb2=No
|amdpbod=
}}

== Bibliography ==
* {{cite techdoc|title=Product Brief: AMD Embedded G-Series APU Platform|url=https://www.amd.com/en/system/files?file%3D2017-06/g-series-platform-brief.pdf|publ=AMD|pid=49282|date=2013}}
* {{cite techdoc|title=BIOS and Kernel Developer’s Guide (BKDG) for AMD Family 14h Models 00h-0Fh Processors|url=https://www.amd.com/system/files/TechDocs/43170_14h_Mod_00h-0Fh_BKDG.pdf|publ=AMD|pid=43170|rev=3.13|date=2012-02-17}}
* {{cite techdoc|title=Revision Guide for AMD Family 14h Models 00h-0Fh Processors|url=https://www.amd.com/system/files/TechDocs/47534_14h_Mod_00h-0Fh_Rev_Guide.pdf|publ=AMD|pid=47534|rev=3.18|date=2013-02-26}}
* {{cite techdoc|authors=Burgess, Brad|title=“Bobcat” AMD’s New Low Power x86 Core Architecture|url=https://hc22.hotchips.org|publ=Hot Chips 22|date=2010-08-24}}
* {{cite article|authors=Burgess, Brad;Cohen, Brad;Denman, Marvin;Dundas, Jim;Kaplan, David;Rupley, Jeff|title=Bobcat: AMD’s Low-Power x86 Processor|date=2011-01-13|journal=IEEE Micro|volume=31|issue=2|pages=16-25|doi=10.1109/MM.2011.2}}
* {{cite article|authors=Foley, Denis;Bansal, Pankaj;Cherepacha, Don;Wasmuth, Robert;Gunasekar, Aswin;Gutta, Srinivasa;Naini, Ajay|title=A Low-Power Integrated x86–64 and Graphics Processor for Mobile Computing Devices|date=2011-10-19|journal=IEEE JSSC|volume=47|issue=1|pages=220-231|doi=10.1109/JSSC.2011.2167776}}
* {{cite article|authors=Rogers, Aaron;Kaplan, David;Quinnell, Eric;Kwan, Bill|title=The Core-C6 (CC6) Sleep State of the AMD Bobcat x86 Microprocessor|date=2012-07-30|conference=ACM/IEEE <abbr title="International Symposium on Low Power Electronics and Design">ISLPED</abbr> 2012|pages=367-372|doi=10.1145/2333660.2333745}}
* [https://ir.amd.com/news-events/press-releases/detail/344/amd-furthers-commitment-to-embedded-customers-with-new.html "AMD Furthers Commitment to Embedded Customers With New Products and Expanded Support for Sales, Design and Software"] (Press release). AMD.com. March 1, 2011.
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Embedded G-Series T48L - AMD#pcie +
base frequency	1,400 MHz (1.4 GHz, 1,400,000 kHz) +
clock multiplier	14 +
core count	2 +
core family	20 +
core name	eBrazos +
designer	AMD +
die area	75 mm² (0.116 in², 0.75 cm², 75,000,000 µm²) +
family	Embedded G-Series +
first launched	March 1, 2011 +
full page name	amd/embedded/t48l +
has amd amd-v technology	true +
has ecc memory support	false +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	2-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	16-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate	March 1, 2011 +
manufacturer	TSMC +
market segment	Embedded +
max cpu count	1 +
max junction temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory bandwidth	7.944 GiB/s (8,134.842 MiB/s, 8.53 GB/s, 8,530 MB/s, 0.00776 TiB/s, 0.00853 TB/s) +
max memory channels	1 +
microarchitecture	Bobcat +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	T48L +
name	Embedded G-Series T48L +
package	FT1 + and UOB413 +
part number	GET48LGBB22GVE +
process	40 nm (0.04 μm, 4.0e-5 mm) +
series	G-Series APU/CPU +
smp max ways	1 +
supported memory type	DDR3-1066 +
tdp	18 W (18,000 mW, 0.0241 hp, 0.018 kW) +
technology	CMOS +
thread count	2 +
transistor count	451,000,000 +
word size	64 bit (8 octets, 16 nibbles) +