Editing amd/packages/fp5

{{amd title|Package FP5}}
{{package
|name=Package FP5
|designer=AMD
|market=Mobile
|market 2=Embedded
|first launched=January 8, 2018
|microarch=Zen
|microarch 2=Zen+
|tdp=45 W
|package name=BGA-1140
|package type=Organic Micro Ball Grid Array
|package contacts=1140
|package dimension=35 mm
|package dimension 2=25 mm
|package pitch=0.7-1.0 mm
}}

'''FP5''' is a BGA-1140 package for [[AMD]] mobile and embedded microprocessors with an integrated north bridge, graphics processor, and controller hub targeting the notebook and embedded market. Its counterpart for desktop processors is the PGA-1331 package for {{\\|Socket AM4}}. FP5 is the successor to the {{\\|FP4}} package and was superseded by the {{\\|FP6}} package.

All processors in the FP5 package, codename "{{amd|Raven Ridge|l=core}}", "{{amd|Great Horned Owl|l=core}}", "{{amd|Banded Kestrel|l=core}}", "{{amd|Picasso|l=core}}", and "{{amd|Dali|l=core}}", are members of AMD's Family 17h with CPU cores based on the {{amd|Zen|l=arch}} and {{amd|Zen+|l=arch}} microarchitecture, and are fabricated on 12 and 14 nm SOI processes.



=== Features ===
* 1140-pin lidless micro ball grid array package, 0.7-1.0 mm multi-pitch, 35 × 25 mm, organic substrate

* 2 × 64/72 bit DDR4 SDRAM interface up to 1600 MHz, PC4-25600 (DDR4-3200), 51.2 GB/s
** Up to 2 SR/DR UDIMMs or SODIMMs (1 per channel), ECC supported
** Up to 32 GiB total

* PCIe Gen 1.0, 2.0, 3.0 (8 GT/s)
** Configurable x8 external graphics card link
** Configurable x8 General Purpose Ports (x4, x2, x1, NVMe, SATA, GbE)

* Up to four independent display controllers
** Four single link Digital Display Interfaces, two multiplexed with one USB 3.1 Type-C port each
** DisplayPort 1.4 up to 3840 × 2160 at 120 Hz, DP++, DP Audio
** HDMI 2.0b up to 4096 × 2160 at 60 Hz
** eDP 1.4 up to 4096 × 2160

* Integrated Controller Hub
** 2 × USB 1.1, 2.0, 3.1 (10 Gb/s), Type-C, DisplayPort Alternate Mode, Power Delivery capable
** 2 × USB 1.1, 2.0, 3.1 (10 Gb/s) 
** 1 × USB 1.1, 2.0, 3.0 (5 Gb/s) 
** 1 × USB 1.1, 2.0 
** 2 × SATA 1.0, 2.0, 3.0 (6 Gb/s) or 1 × SATA Express, each port multiplexed with one (SATA Express two) x1 GPP lane
** 2 × 1/2.5/10 Gigabit Ethernet, multiplexed with GPP
** eMMC 5.0, SD/SDIO 3.0/4.0, 2 × UART, 4 × I2C, 2 × SMBus, LPC, SPI/eSPI, I2S/HDA/SW, Serial IRQ, GPIO

Note some processor models support only a subset of these features.

== Processors using package FP5 ==
* AMD Ryzen 3/5/7 Mobile Processor
* AMD Athlon 3000 Series Mobile Processor
* AMD Ryzen Embedded V1000 Series
* AMD Ryzen Embedded R1000 Series

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           This table is generated automatically from the data in the actual articles.
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           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="19">List of all FP5-based Processors</th></tr>
{{comp table header 1|cols=Price, Process, Launched, µarch, Family, Core, C, T, Freq, Turbo, TDP}}
{{#ask: [[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[package::FP5]]
 |?full page name
 |?model number
 |?release price
 |?process
 |?first launched
 |?microarchitecture
 |?microprocessor family
 |?core name
 |?core count
 |?thread count
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?tdp
 |format=template
 |template=proc table 3
 |userparam=13
 |mainlabel=-
}}
{{comp table count|ask=[[Category:microprocessor models by amd]] [[instance of::microprocessor]] [[package::FP5]]}}
</table>
{{comp table end}}

== Package Diagram ==
:[[File:BGA-1140 RR diag.svg]]

Approximate dimensions of the Raven Ridge package. All dimensions in millimeters.

:[[File:BGA-1140 BK diag.svg]]

Approximate dimensions of the Banded Kestrel package. All dimensions in millimeters.

:[[File:BGA-1140 pn.svg|800px]]

FP5 package ball numbers.

== Pin Map ==
:[[File:BGA-1140 pinmap.svg|800px]]

== References ==
* "Processor Programming Reference (PPR) for AMD Family 17h Model 18h, Revision B1 Processors (PUB)", AMD Publ. #55570, Rev. 3.14, October 8, 2019
* "Processor Programming Reference (PPR) for AMD Family 17h Model 20h, Revision A1 Processors", AMD Publ. #55772, Rev. 3.07, May 21, 2020
* "Product Brief: AMD Ryzen™ Embedded V1000 Processor Family", PID 1887101-F, 2019
* "Product Brief: AMD Ryzen™ Embedded R1000 Processor Family", PID 19237320-E, 2020
* "Hot Chips 30: AMD Ryzen™ Processors with Radeon™ Vega Graphics", August 2018

== See also ==
* {{\\|FP4|Package FP4}}
* {{\\|FP6|Package FP6}}
* {{\\|Socket AM4}}

[[Category:amd]]
designer	AMD +
first launched	January 8, 2018 +
instance of	package +
market segment	Mobile + and Embedded +
microarchitecture	Zen + and Zen+ +
name	Package FP5 +
package	FP5 +
package contacts	1,140 +
package length	35 mm (3.5 cm, 1.378 in) +
package pitch	0.7 mm (0.0276 in) +
package type	Organic Micro Ball Grid Array +
package width	25 mm (2.5 cm, 0.984 in) +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +