Editing amd/ryzen 9/4900h

{{amd title|Ryzen 9 4900H}}
{{chip
|name=Ryzen 9 4900H
|no image=No
|designer=AMD
|manufacturer=TSMC
|model number=4900H
|market=Mobile
|first announced=March 16, 2020
|first launched=March 16, 2020
|family=Ryzen 9
|series=4000
|locked=Yes
|frequency=3,300 MHz
|turbo frequency=4,400 MHz
|clock multiplier=33
|isa=x86-64
|isa family=x86
|microarch=Zen 2
|core name=Renoir
|process=7 nm
|transistors=9,800,000,000
|technology=CMOS
|die area=156 mm²
|word size=64 bit
|core count=8
|thread count=16
|max memory=64 GiB
|max cpus=1
|tdp=45 W
|ctdp down=35 W
|ctdp up=54 W
|tcase min=0 °C
|tcase max=105 °C
|package name 1=amd,socket_fp6
}}
'''Ryzen 9 4900H''' is a {{arch|64}} [[octa-core]] high-end performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2020]]. Fabricated on [[N7|TSMC's 7-nanometer process]] based on AMD's {{amd|Zen 2|Zen 2 microarchitecture|l=arch}}, the 4900H operates at a base frequency of 3.3 GHz with a [[TDP]] of 45 W and a {{amd|Precision Boost|Boost}} frequency of up to 4.4 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4900H integrates a {{amd|Radeon Vega 8}} Graphics operating at up to 1.75 GHz.

This model supports a configurable TDP-down of 35 W and TDP-up of 54 W.

The {{\\|4900HS}} is a lower-power version of this processor, featuring slightly lower base and turbo frequencies.

== Cache ==
{{main|amd/microarchitectures/zen 2#Memory_Hierarchy|l1=Zen 2 § Cache}}
{{cache size
|l1 cache=512 KiB
|l1i cache=256 KiB
|l1i break=8x32 KiB
|l1i desc=8-way set associative
|l1d cache=256 KiB
|l1d break=8x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=4 MiB
|l2 break=8x512 KiB
|l2 desc=8-way set associative
|l2 policy=write-back
|l3 cache=8 MiB
|l3 break=2x4 MiB
}}

== Memory controller ==
This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).

{{memory controller
|type=DDR4-3200
|type 2=LPDDR4x-4266
|max mem=64 GiB
|controllers=2
|channels=4
|max bandwidth=68.27 GiB/s
|bandwidth schan=17.88 GiB/s
|bandwidth dchan=34.13 GB/s
|bandwidth qchan=68.27 GB/s
}}

== Expansions ==
This processor has 16 PCIe lanes, 1x8 designated for a discrete [[GPU]], 1x4 additional lanes for storage (e.g., NVMe), and 1x4 additional lanes reserved for additional peripherals  (e.g., WiFi or LTE).

{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=3.0
|pcie lanes=16
|pcie config=1x8+1x4+1x4
|pcie config 2=2x4+1x4+1x4
}}
}}

== Graphics ==
{{integrated graphics
| gpu                 = Radeon Vega 8
| device id           = 
| designer            = AMD
| execution units     = 5
| unified shaders     = 512
| max displays        = 4
| max memory          = 
| frequency           = 
| max frequency       = 1,750 MHz

| output crt          = 
| output sdvo         = 
| output dsi          = 
| output edp          = 
| output dp           = Yes
| output hdmi         = Yes
| output vga          = 
| output dvi          = 

| directx ver        = 
| opengl ver         = 
| opencl ver         = 
| hdmi ver           = 
| dp ver             = 
| edp ver            = 
| max res hdmi       = 
| max res hdmi freq  = 
| max res dp         = 
| max res dp freq    = 
| max res edp        = 
| max res edp freq   = 
| max res vga        = 
| max res vga freq   = 
}}
{{zen 2 with vega hardware accelerated video table}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Ryzen 9 4900H - AMD#pcie +
base frequency	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
clock multiplier	33 +
core count	8 +
core family	23 +
core model	96 +
core name	Renoir +
core stepping	A1 +
designer	AMD +
die area	156 mm² (0.242 in², 1.56 cm², 156,000,000 µm²) +
family	Ryzen 9 +
first announced	March 16, 2020 +
first launched	March 16, 2020 +
full page name	amd/ryzen 9/4900h +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has amd amd-v technology	true +
has amd amd-vi technology	true +
has amd sensemi technology	true +
has ecc memory support	false +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multiplier	true +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	Radeon Vega 8 +
integrated gpu designer	AMD +
integrated gpu execution units	8 +
integrated gpu max frequency	1,750 MHz (1.75 GHz, 1,750,000 KHz) +
isa	x86-64 +
isa family	x86 +
l1$ size	512 KiB (524,288 B, 0.5 MiB) +
l1d$ description	8-way set associative +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) +
l1i$ description	8-way set associative +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) +
l2$ description	8-way set associative +
l2$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description	16-way set associative +
l3$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldate	March 16, 2020 +
manufacturer	TSMC +
market segment	Mobile +
max case temperature	378.15 K (105 °C, 221 °F, 680.67 °R) +
max cpu count	1 +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	63.581 GiB/s (65,107.346 MiB/s, 68.27 GB/s, 68,270 MB/s, 0.0621 TiB/s, 0.0683 TB/s) +
max memory channels	4 +
microarchitecture	Zen 2 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	4900H +
name	Ryzen 9 4900H +
package	FP6 +
process	7 nm (0.007 μm, 7.0e-6 mm) +
series	4000 +
smp max ways	1 +
supported memory type	DDR4-3200 + and LPDDR4x-4266 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
tdp down	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
tdp up	54 W (54,000 mW, 0.0724 hp, 0.054 kW) +
technology	CMOS +
thread count	16 +
transistor count	9,800,000,000 +
turbo frequency	4,400 MHz (4.4 GHz, 4,400,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +