Editing hisilicon/kunpeng/920-4826

{{hisilicon title|Kunpeng 920-4826}}
{{chip
|name=Kunpeng 920-4826
|image=kunpeng 920 (front).png
|designer=HiSilicon
|designer 2=ARM Holdings
|manufacturer=TSMC
|model number=920-4826
|market=Server
|first announced=April 26, 2019
|first launched=April 26, 2019
|family=Hi16xx
|series=920
|frequency=2,600 MHz
|isa=ARMv8.2
|isa family=ARM
|microarch=TaiShan v110
|core name=TaiShan v110
|transistors=20,000,000,000
|technology=CMOS
|mcp=Yes
|die count=3
|word size=64 bit
|core count=48
|thread count=48
|max cpus=4
|max memory=1 TiB
|tdp=150 W
}}
[[File:hi1620 exhibit sign.jpg|thumb|right|Hi1620 on exhibit.]]
'''Kunpeng 920-4826''' is a [[octatetraconta-core]] {{arch|64}} [[ARM]] server microprocessor introduced by [[HiSilicon]] in early 2019. Fabricated by [[TSMC]] on a [[7 nm process|7nm HPC process]] based on the {{hisilicon|TaiSHan v110|l=arch}} microarchitecture, this chip incorporates 48 cores operating at 2.6 GHz with a TDP of 150 W. This chip supports up to 1 TiB of octa-channel DDR4-2933 memory.

== Cache ==
{{main|hisilicon/microarchitectures/taishan_v110#Memory_Hierarchy|l1=TaiShan v110 § Cache}}
{{cache size
|l1 cache=6 MiB
|l1i cache=3 MiB
|l1i break=48x64 KiB
|l1d cache=3 MiB
|l1d break=48x64 KiB
|l2 cache=24 MiB
|l2 break=48x512 KiB
|l3 cache=48 MiB
|l3 break=48x1 MiB
}}

== Memory controller ==
{{memory controller
|type=DDR4-2933
|ecc=Yes
|max mem=1 TiB
|controllers=1
|channels=8
|width=64 bit
|max bandwidth=190.7 GiB/s
|bandwidth schan=23.84 GiB/s
|bandwidth dchan=47.68 GiB/s
|bandwidth qchan=95.37 GiB/s
|bandwidth ochan=190.7 GiB/s
}}

== Expansions ==
{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=4.0
|pcie lanes=40
|pcie config=x16
|pcie config 2=x8
|pcie config 3=x4
}}
{{expansions entry
|type=USB
|usb revision=3.0
|usb ports=4
}}
{{expansions entry
|type=SATA
|sata revision=3.0
|sata ports=2
}}
}}
== Features ==
{{arm features
|thumb=No
|thumb2=No
|thumbee=No
|vfpv1=No
|vfpv2=No
|vfpv3=No
|vfpv3-d16=No
|vfpv3-f16=No
|vfpv4=No
|vfpv4-d16=No
|vfpv5=No
|neon=Yes
|trustzone=No
|jazelle=No
|wmmx=No
|wmmx2=No
|pmuv3=No
|crc32=Yes
|crypto=Yes
|fp=No
|fp16=Yes
|profile=No
|ras=Yes
|simd=No
|rdm=No
}}

== Utilizing devices ==
* [[used by::HiSilicon D06]]
* [[used by::TaiShan 5280]]
* [[used by::TaiShan 5290]]
* [[used by::TaiShan X6000]]

{{expand list}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Kunpeng 920-4826 - HiSilicon#pcie +
base frequency	2,600 MHz (2.6 GHz, 2,600,000 kHz) +
core count	48 +
core name	TaiShan v110 +
designer	HiSilicon + and ARM Holdings +
die count	3 +
family	Hi16xx +
first announced	April 26, 2019 +
first launched	April 26, 2019 +
full page name	hisilicon/kunpeng/920-4826 +
has ecc memory support	true +
instance of	microprocessor +
is multi-chip package	true +
isa	ARMv8.2 +
isa family	ARM +
l1$ size	6,144 KiB (6,291,456 B, 6 MiB) +
l1d$ size	3,072 KiB (3,145,728 B, 3 MiB) +
l1i$ size	3,072 KiB (3,145,728 B, 3 MiB) +
l2$ size	24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
l3$ size	48 MiB (49,152 KiB, 50,331,648 B, 0.0469 GiB) +
ldate	April 26, 2019 +
main image	+
manufacturer	TSMC +
market segment	Server +
max cpu count	4 +
max memory	1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth	190.7 GiB/s (195,276.8 MiB/s, 204.763 GB/s, 204,762.566 MB/s, 0.186 TiB/s, 0.205 TB/s) +
max memory channels	8 +
max sata ports	2 +
max usb ports	4 +
microarchitecture	TaiShan v110 +
model number	920-4826 +
name	Kunpeng 920-4826 +
series	920 +
smp max ways	4 +
supported memory type	DDR4-2933 +
tdp	158 W (158,000 mW, 0.212 hp, 0.158 kW) +
technology	CMOS +
thread count	48 +
transistor count	20,000,000,000 +
used by	HiSilicon D06 +, TaiShan 5280 +, TaiShan 5290 + and TaiShan X6000 +
word size	64 bit (8 octets, 16 nibbles) +