Editing amd/ryzen 5/3550h

{{amd title|Ryzen 5 3550H}}
{{chip
|name=Ryzen 5 3550H
|no image=Yes
|designer=AMD
|manufacturer=GlobalFoundries
|model number=3550H
|part number=YM3500C4T4MFG
|market=Mobile
|first announced=January 6, 2019
|first launched=January 6, 2019
|family=Ryzen 5
|series=3000
|frequency=2,100 MHz
|turbo frequency1=3,700 MHz
|bus type=PCIe 3.0
|clock multiplier=21
|isa=x86-64
|isa family=x86
|microarch=Zen+
|core name=Picasso
|process=12 nm
|transistors=4,940,000,000
|technology=CMOS
|die area=209.78 mm²
|word size=64 bit
|core count=4
|thread count=8
|max cpus=1
|max memory=64 GiB
|tdp=35 W
|temp min=0° C
|temp max=105 °C
|package name 1=amd,socket_fp5
}}
'''Ryzen 5 3550H''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2019]]. This processor is based on AMD's {{amd|Zen+|Zen+ microarchitecture|l=arch}} and is fabricated on a [[12 nm process]]. The 3550H operates at a base frequency of 2.1 GHz with a [[TDP]] of 35 W and a {{amd|Precision Boost|Boost}} frequency of 3.7 GHz. This APU supports up to 32 GiB of dual-channel DDR4-2400 memory and incorporates {{amd|Radeon Vega 8}} Graphics operating at up to 1.2 GHz.

== Cache ==
{{main|amd/microarchitectures/zen+#Memory_Hierarchy|l1=Zen+ § Cache}}
{{cache size
|l1 cache=384 KiB
|l1i cache=256 KiB
|l1i break=4x64 KiB
|l1i desc=4-way set associative
|l1d cache=128 KiB
|l1d break=4x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=2 MiB
|l2 break=4x512 KiB
|l2 desc=8-way set associative
|l2 policy=write-back
|l3 cache=4 MiB
|l3 break=1x4 MiB
}}

== Memory controller ==
{{memory controller
|type=DDR4-2400
|ecc=Yes
|max mem=32 GiB
|controllers=2
|channels=2
|max bandwidth=35.76 GiB/s
|bandwidth schan=17.88 GiB/s
|bandwidth dchan=35.76 GiB/s
}}

== Expansions ==
This processor has 12 PCIe lanes, 1x8 typically designated for a [[GPU]] and 4 additional lanes for storage (e.g., NVMe).
{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=3.0
|pcie lanes=12
|pcie config=1x8+1x4
|pcie config 2=2x4+1x4
}}
}}

== Graphics ==
{{integrated graphics
| gpu                 = Radeon Vega 8
| device id           = 
| designer            = AMD
| execution units     = 8
| unified shaders     = 512
| max displays        = 4
| max memory          = 
| frequency           = 
| max frequency       = 1,200 MHz

| output crt          = 
| output sdvo         = 
| output dsi          = 
| output edp          = 
| output dp           = Yes
| output hdmi         = Yes
| output vga          = 
| output dvi          = 

| directx ver        = 12
| opengl ver         = 4.6
| opencl ver         = 2.2
| hdmi ver           = 
| dp ver             = 
| edp ver            = 
| max res hdmi       = 
| max res hdmi freq  = 
| max res dp         = 
| max res dp freq    = 
| max res edp        = 
| max res edp freq   = 
| max res vga        = 
| max res vga freq   = 
}}
{{zen with vega hardware accelerated video table|col=1}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Ryzen 5 3550H - AMD#pcie +
base frequency	2,100 MHz (2.1 GHz, 2,100,000 kHz) +
bus type	PCIe 3.0 +
clock multiplier	21 +
core count	4 +
core name	Picasso +
designer	AMD +
die area	209.78 mm² (0.325 in², 2.098 cm², 209,780,000 µm²) +
family	Ryzen 5 +
first announced	January 6, 2019 +
first launched	January 6, 2019 +
full page name	amd/ryzen 5/3550h +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has amd amd-v technology	true +
has amd amd-vi technology	true +
has amd sensemi technology	true +
has ecc memory support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	radeon vega 8 +
integrated gpu designer	AMD +
integrated gpu execution units	8 +
integrated gpu max frequency	1,200 MHz (1.2 GHz, 1,200,000 KHz) +
isa	x86-64 +
isa family	x86 +
l1$ size	384 KiB (393,216 B, 0.375 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	4-way set associative +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) +
l2$ description	8-way set associative +
l2$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldate	January 6, 2019 +
manufacturer	GlobalFoundries +
market segment	Mobile +
max cpu count	1 +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	35.763 GiB/s (36,621.094 MiB/s, 38.4 GB/s, 38,400 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels	2 +
max operating temperature	105 °C +
microarchitecture	Zen+ +
min operating temperature	0° C +
model number	3550H +
name	Ryzen 5 3550H +
package	FP5 +
part number	YM3500C4T4MFG +
process	12 nm (0.012 μm, 1.2e-5 mm) +
series	3000 +
smp max ways	1 +
supported memory type	DDR4-2400 +
tdp	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technology	CMOS +
thread count	8 +
transistor count	4,940,000,000 +
turbo frequency	3,700 MHz (3.7 GHz, 3,700,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +