Editing hisilicon/kirin/980

Warning: You are editing an out-of-date revision of this page. If you save it, any changes made since this revision will be lost.

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Summary:

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)

Templates used on this page:

Template:\\ (edit)
Template:abbr (edit)
Template:arch (view source) (protected)
Template:armh (edit)
Template:cache size (view source) (protected)
Template:chip (view source) (protected)
Template:hisil title (edit)
Template:hisilicon title (edit)
Template:integrated graphics (edit)
Template:istrue (view source) (protected)
Template:link-armh (edit)
Template:main (view source) (protected)
Template:memory controller (edit)
Template:url parse anchor (view source) (protected)
Template:url parse article (view source) (protected)
Module:chip (view source)

base frequency	2,600 MHz (2.6 GHz, 2,600,000 kHz) +, 1,920 MHz (1.92 GHz, 1,920,000 kHz) + and 1,800 MHz (1.8 GHz, 1,800,000 kHz) +
core count	8 +
core name	Cortex-A76 + and Cortex-A55 +
designer	HiSilicon + and ARM Holdings +
die area	74.13 mm² (0.115 in², 0.741 cm², 74,130,000 µm²) +
family	Kirin +
first announced	August 31, 2018 +
first launched	August 31, 2018 +
full page name	hisilicon/kirin/980 +
has ecc memory support	false +
instance of	microprocessor +
integrated gpu	Mali-G76 +
integrated gpu base frequency	720 MHz (0.72 GHz, 720,000 KHz) +
integrated gpu designer	ARM Holdings +
integrated gpu execution units	10 +
isa	ARMv8 +
isa family	ARM +
l1$ size	512 KiB (524,288 B, 0.5 MiB) + and 256 KiB (262,144 B, 0.25 MiB) +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) +
l2$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldate	3000 +
manufacturer	TSMC +
market segment	Mobile +
max memory bandwidth	31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	4 +
microarchitecture	Cortex-A76 + and Cortex-A55 +
model number	980 +
name	Kirin 980 +
process	7 nm (0.007 μm, 7.0e-6 mm) +
supported memory type	LPDDR4X-4266 +
technology	CMOS +
thread count	8 +
transistor count	6,900,000,000 +
used by	Huawei Mate 20 +, Huawei Mate 20 Pro +, Huawei Mate 20 X +, Huawei Mate 20 RS Porsche Design +, Honor Magic 2 +, Honor View 20 / V20 +, Huawei Mate X +, Huawei P30 +, Huawei P30 Pro +, Huawei Honor 20 +, Huawei Honor 20 Pro +, Huawei Mediapad M6 8.4 +, Huawei Mediapad M6 10.8 +, Huawei Mate 20 X 5G +, Huawei Nova 5T + and Huawei Nova 5 Pro +
word size	64 bit (8 octets, 16 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung