Editing zhaoxin/kaisheng/kh-26800

{{zhaoxin title|KaisHeng KH-26800}}
{{chip
|name=KaisHeng KH-26800
|image=KH-26800.png
|caption=KH-26800 front
|designer=Zhaoxin
|manufacturer=HLMC
|model number=KH-26800
|part number=KH-26800
|market=Server
|market 2=Networking
|market 3=Embedded
|first announced=December 28, 2017
|first launched=December 28, 2017
|family=KaisHeng
|series=KH-20000
|frequency=2,000 MHz
|bus type=PCIe 3.0
|bus links=4
|bus rate=8 GT/s
|isa=x86-64
|isa family=x86
|microarch=WuDaoKou
|process=28 nm
|transistors=2,100,000,000
|technology=CMOS
|die area=187 mm²
|word size=64 bit
|core count=8
|thread count=8
|max cpus=1
|max memory=128 GiB
|tjunc min=0 °C
|tjunc max=90 °C
}}
'''KaisHeng KH-26800''' is a {{arch|64}} [[octa-core]] [[x86]] microprocessor designed by [[Zhaoxin]] and introduced in late [[2017]] specifically for the [[Chinese]] market. This processor is fabricated on a [[28 nm process]] based on the {{zhaoxin|WuDaoKou|l=arch}} microarchitecture. The KH-26800 operates at 2 GHz with a TDP of ? W and supports up to 128 GiB of dual-channel DDR4-2133 ECC memory.


{{unknown features}}


== Cache ==
{{main|zhaoxin/microarchitectures/wudaokou#Memory_Hierarchy|l1=WuDaoKou § Cache}}
{{cache size
|l1 cache=512 KiB
|l1i cache=256 KiB
|l1i break=8x32 KiB
|l1i desc=8-way set associative
|l1d cache=256 KiB
|l1d break=8x32 KiB
|l1d desc=8-way set associative
|l2 cache=8 MiB
|l2 break=2x4 MiB
|l2 desc=32-way set associative
}}

== Memory controller ==
{{memory controller
|type=DDR4-2133
|ecc=Yes
|max mem=128 GiB
|controllers=1
|channels=2
|max bandwidth=31.79 GiB/s
|bandwidth schan=15.89 GiB/s
|bandwidth dchan=31.79 GiB/s
}}

== Expansions ==
{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=3.0
|pcie lanes=24
|pcie config=x16
|pcie config 2=x8
|pcie config 3=x4
}}
}}

== Features == 
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=Yes
|nx=Yes
|mmx=Yes
|emmx=Yes
|sse=Yes
|sse2=Yes
|sse3=Yes
|ssse3=Yes
|sse41=Yes
|sse42=Yes
|sse4a=No
|avx=Yes
|avx2=Yes
|avx512f=No
|avx512cd=No
|avx512er=No
|avx512pf=No
|avx512bw=No
|avx512dq=No
|avx512vl=No
|avx512ifma=No
|avx512vbmi=No
|avx5124fmaps=No
|avx5124vnniw=No
|avx512vpopcntdq=No
|abm=No
|tbm=No
|bmi1=No
|bmi2=No
|fma3=No
|fma4=No
|aes=Yes
|rdrand=Yes
|sha=Yes
|xop=No
|adx=No
|clmul=No
|f16c=No
|tbt1=No
|tbt2=No
|tbmt3=No
|bpt=No
|eist=No
|sst=No
|flex=No
|fastmem=No
|ivmd=No
|intelnodecontroller=No
|intelnode=No
|kpt=No
|ptt=No
|intelrunsure=No
|mbe=No
|isrt=No
|sba=No
|mwt=No
|sipp=No
|att=No
|ipt=No
|tsx=No
|txt=Yes
|ht=No
|vpro=No
|vtx=Yes
|vtd=No
|ept=Yes
|mpx=No
|sgx=No
|securekey=No
|osguard=No
|intqat=No
|3dnow=No
|e3dnow=No
|smartmp=No
|powernow=No
|amdvi=No
|amdv=No
|amdsme=No
|amdtsme=No
|amdsev=No
|rvi=No
|smt=No
|sensemi=No
|xfr=No
|mxfr=No
|amdpb=No
|amdpb2=No
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	KaisHeng KH-26800 - Zhaoxin#pcie +
base frequency	2,000 MHz (2 GHz, 2,000,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	PCIe 3.0 +
core count	8 +
designer	Zhaoxin +
die area	187 mm² (0.29 in², 1.87 cm², 187,000,000 µm²) +
family	KaisHeng +
first announced	December 28, 2017 +
first launched	December 28, 2017 +
full page name	zhaoxin/kaisheng/kh-26800 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Encryption Standard Instruction Set Extension +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Extended Page Tables +, Intel VT-x + and Trusted Execution Technology +
has intel trusted execution technology	true +
has intel vt-x technology	true +
has second level address translation support	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	512 KiB (524,288 B, 0.5 MiB) +
l1d$ description	8-way set associative +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) +
l1i$ description	8-way set associative +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) +
l2$ description	32-way set associative +
l2$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldate	December 28, 2017 +
main image	+
main image caption	KH-26800 front +
manufacturer	HLMC +
market segment	Embedded +, Networking + and Server +
max cpu count	1 +
max junction temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
microarchitecture	WuDaoKou +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	KH-26800 +
name	KaisHeng KH-26800 +
part number	KH-26800 +
process	28 nm (0.028 μm, 2.8e-5 mm) +
series	KH-20000 +
smp max ways	1 +
supported memory type	DDR4-2133 +
technology	CMOS +
thread count	8 +
transistor count	2,100,000,000 +
word size	64 bit (8 octets, 16 nibbles) +