From WikiChip
Editing zhaoxin/kaixian/kx-u5580m
Warning: You are editing an out-of-date revision of this page. If you save it, any changes made since this revision will be lost.
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Facts about "KaiXian KX-U5580M - Zhaoxin"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | KaiXian KX-U5580M - Zhaoxin#pcie + |
base frequency | 1,800 MHz (1.8 GHz, 1,800,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | PCIe 3.0 + |
clock multiplier | 18 + |
core count | 8 + |
designer | Zhaoxin + |
die area | 187 mm² (0.29 in², 1.87 cm², 187,000,000 µm²) + |
family | KaiXian + |
first announced | December 28, 2017 + |
first launched | December 28, 2017 + |
full page name | zhaoxin/kaixian/kx-u5580m + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Trusted Execution Technology +, Intel VT-x + and Extended Page Tables + |
has intel trusted execution technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | ? + |
integrated gpu designer | Zhaoxin + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l2$ description | 32-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
ldate | December 28, 2017 + |
main image | + |
main image caption | KX-U5580M front + |
manufacturer | HLMC + |
market segment | Desktop +, Mobile + and Embedded + |
max cpu count | 1 + |
max junction temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
microarchitecture | WuDaoKou + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | KX-U5580M + |
name | KaiXian KX-U5580M + |
part number | KX-U5580M + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
series | KX-5000 + |
smp max ways | 1 + |
supported memory type | DDR4-2133 + |
technology | CMOS + |
thread count | 8 + |
transistor count | 2,100,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |