Editing intel/xeon e3/e3-1205 v6

{{intel title|Xeon E3-1205 v6}}
{{mpu
| future              = Yes
| name                = Xeon E3-1205 v6
| no image            = Yes
| image               = 
| image size          = 
| caption             = 
| designer            = Intel
| manufacturer        = Intel
| model number        = E3-1205 v6
| part number         = CM8067702871025
| part number 2       =  
| market              = Workstation
| first announced     = October 28, 2016
| first launched      = 2017
| last order          = 
| last shipment       = 

| family              = Xeon E3
| series              = E3-1200 v6
| locked              = Yes
| frequency           = 3,000 MHz
| turbo frequency     = Yes
| turbo frequency1    = 
| turbo frequency2    = 
| turbo frequency3    = 
| turbo frequency4    = 
| bus type            = DMI 3.0
| bus speed           = 
| bus rate            = 8 GT/s
| clock multiplier    = 
| s-spec              = SR32D
| s-spec 2            = 
| s-spec es           = 
| s-spec qs           = 
| cpuid               = 

| microarch           = Kaby Lake
| platform            = 
| chipset             = 
| core name           = 
| core family         = 
| core model          = 
| core stepping       = 
| process             = 14 nm
| transistors         = 
| technology          = CMOS
| die size            = 
| word size           = 64 bit
| core count          = 4
| thread count        = 8
| max cpus            = 1
| max memory          = 

| electrical          = 
| v core              = 
| v core tolerance    = 
| sdp                 = 
| tdp                 = 
| ctdp down           = 
| ctdp down frequency =
| ctdp up             =
| ctdp up frequency   =
| temp max            = 
| temp min            = 

| packaging           = 
| package             = 
| package type        = 
| package size        = 
| socket              = 
| socket type         = 
}}
The '''Xeon E3-1205 v6''' is an entry-level workstations and servers {{arch|64}} [[x86]] [[quad-core]] microprocessor designed by [[Intel]] and set to be released in late 2016 or early 2017. This {{intel|Kaby Lake}}-based chip operates at 3 GHz.


{{unknown features}}

== Cache ==
{{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}}
{{cache size
|l1 cache=256 KiB
|l1i cache=128 KiB
|l1i break=4x32 KiB
|l1i desc=8-way set associative
|l1i policy=write-back
|l1d cache=128 KiB
|l1d break=4x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=1 MiB
|l2 break=4x256 KiB
|l2 desc=4-way set associative
|l2 policy=write-back
|l3 cache=8 MiB
|l3 break=4x2 MiB
|l3 desc=16-way set associative
|l3 policy=write-back
}}

== Memory controller ==
{{memory controller
|type=DDR3L-1600
|type 2=LPDDR3-2133
|type 3=DDR4-2400
|ecc=Yes
|max mem=64 GiB
|controllers=1
|channels=2
|max bandwidth=35.76 GiB/s
|bandwidth schan=17.88 GiB/s
|bandwidth dchan=35.76 GiB/s
}}

== Expansions ==
{{expansions
| pcie revision      = 3.0
| pcie lanes         = 16
| pcie config        = 1x16
| pcie config 2      = 2x8
| pcie config 3      = 1x8+2x4
}}

== Graphics ==
{{empty section}}

== Features == 
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=Yes
|nx=Yes
|3dnow=No
|e3dnow=No
|mmx=Yes
|emmx=Yes
|sse=Yes
|sse2=Yes
|sse3=Yes
|ssse3=Yes
|sse41=Yes
|sse42=Yes
|sse4a=No
|avx=Yes
|avx2=Yes
|avx512=No
|abm=Yes
|tbm=No
|bmi1=Yes
|bmi2=Yes
|fma3=Yes
|fma4=No
|aes=Yes
|rdrand=Yes
|sha=No
|xop=No
|adx=Yes
|clmul=Yes
|f16c=Yes
|tbt1=No
|tbt2=Yes
|tbmt3=No
|bpt=No
|eist=Yes
|sst=Yes
|flex=Yes
|fastmem=No
|isrt=Yes
|sba=No
|mwt=Yes
|sipp=Yes
|att=No
|ipt=No
|tsx=Yes
|txt=Yes
|ht=Yes
|vpro=Yes
|vtx=Yes
|vtd=Yes
|ept=Yes
|mpx=Yes
|sgx=Yes
|securekey=Yes
|osguard=Yes
|smartmp=No
|powernow=No
|amdv=No
|rvi=No
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon E3-1205 v6 - Intel#package + and Xeon E3-1205 v6 - Intel#io +
base frequency	3,000 MHz (3 GHz, 3,000,000 kHz) +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Sunrise Point + and Union Point +
clock multiplier	30 +
core count	4 +
core family	6 +
core model	158 +
core name	Kaby Lake DT +
core stepping	B0 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x191D +
family	Xeon E3 +
first announced	March 28, 2017 +
first launched	March 28, 2017 +
full page name	intel/xeon e3/e3-1205 v6 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Transactional Synchronization Extensions +, Secure Key Technology +, Advanced Vector Extensions +, Enhanced SpeedStep Technology +, OS Guard +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions +
has intel enhanced speedstep technology	true +
has intel secure key technology	true +
has intel speed shift technology	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics P630 +
integrated gpu base frequency	350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	24 +
integrated gpu max frequency	1,000 MHz (1 GHz, 1,000,000 KHz) +
integrated gpu max memory	1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	4-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	16-way set associative +
l3$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldate	March 28, 2017 +
manufacturer	Intel +
market segment	Workstation + and Server +
max cpu count	1 +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels	2 +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Kaby Lake +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	E3-1205 v6 +
name	Xeon E3-1205 v6 +
package	FCLGA-1151 +
part number	CM8067702871025 +
platform	Greenlow +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 193.00 (€ 173.70, £ 156.33, ¥ 19,942.69) +
s-spec	SR32D +
series	E3-1200 v6 +
smp max ways	1 +
socket	LGA-1151 +
supported memory type	DDR4-2400 + and DDR3L-1866 +
tdp	65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technology	CMOS +
thread count	8 +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +