Editing mediatek/helio/mt6799

{{mediatek title|Helio X30}}
{{mpu
| future              = Yes
| name                = MediaTek Helio X20
| no image            = yes
| image               = 
| image size          = 
| caption             = 
| designer            = MediaTek
| designer 2          = ARM Holdings
| manufacturer        = TSMC
| model number        = Helio X20
| part number         = 
| part number 2       = 
| market              = Mobile
| market 2            = Embedded
| first announced     = September 26, 2016
| first launched      = 
| last order          = 
| last shipment       = 
| release price       = 

| family              = Helio
| series              = Helio X
| locked              = 
| frequency           = 2,800 MHz
| frequency 2         = 2,200 MHz
| frequency 3         = 2,000 MHz
| bus type            = AMBA 4 AXI
| bus speed           = 
| bus rate            = 
| bus links           = 
| clock multiplier    =

| isa family          = ARM
| isa                 = ARMv8
| microarch           = Cortex-A53
| microarch 2         = Cortex-A72
| platform            = 
| chipset             = 
| core name           = Cortex-A53
| core name 2         = Cortex-A72
| core family         = 
| core model          = 
| core stepping       = 
| process             = 20 nm
| transistors         = 
| technology          = CMOS
| die area            = <!-- XX mm² -->
| die width           = 
| die length          = 
| word size           = 64 bit
| core count          = 10
| thread count        = 10
| max cpus            = 1
| max memory          = 

| electrical          = 
| power               = 
| v core              = 
| v core tolerance    = 
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| v io 2              = 
| v io 3              = 
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| temp min            = 
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| tstorage min        = <!-- °C -->
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| packaging           = 
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}}
'''Helio X30''' is a {{arch|64}} [[deca-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and set to be launched in early [[2017]]. This SoC incorporates 3 independent clusters of cores (called "Tri-Cluster" by MediaTek) operating at varying degrees of performance designed for certain workloads (operating at 2 GHz, 2.2 GHz, and 2.8 GHz) and supports dual-channel LPDDR3-1866. This SoC also incorporates a {{imgtec|PowerVR GT7400}} [[IGP]] operating at 870 MHz. The chip has a modem supporting [[LTE]] User Equipment (UE) category 10.
base frequency	2,500 MHz (2.5 GHz, 2,500,000 kHz) +, 2,200 MHz (2.2 GHz, 2,200,000 kHz) + and 1,900 MHz (1.9 GHz, 1,900,000 kHz) +
bus type	AMBA 4 AXI +
core count	10 +
core name	Cortex-A35 +, Cortex-A53 + and Cortex-A73 +
designer	MediaTek + and ARM Holdings +
family	Helio +
first announced	September 26, 2016 +
first launched	February 27, 2017 +
full page name	mediatek/helio/mt6799 +
has 2g support	true +
has 3g support	true +
has 4g support	true +
has cdma2000 1x support	true +
has cdma2000 1xev-do support	true +
has cdma2000 support	true +
has csd support	true +
has dc-hsdpa support	true +
has e-utran support	true +
has ecc memory support	false +
has edge support	true +
has gprs support	true +
has gsm support	true +
has hsupa support	true +
has lte advanced support	true +
has td-scdma support	true +
has umts support	true +
instance of	microprocessor +
integrated gpu	PowerVR GT7400 Plus +
integrated gpu base frequency	800 MHz (0.8 GHz, 800,000 KHz) +
integrated gpu designer	Imagination Technologies +
isa	ARMv8 +
isa family	ARM +
ldate	February 27, 2017 +
manufacturer	TSMC +
market segment	Mobile + and Embedded +
max cpu count	1 +
max memory	8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth	27.81 GiB/s (28,477.44 MiB/s, 29.861 GB/s, 29,860.76 MB/s, 0.0272 TiB/s, 0.0299 TB/s) +
max memory channels	4 +
microarchitecture	Cortex-A53 +, Cortex-A73 + and Cortex-A35 +
model number	Helio X30 +
name	MediaTek Helio X30 +
part number	MT6799 +
process	10 nm (0.01 μm, 1.0e-5 mm) +
series	Helio X +
smp max ways	1 +
supported memory type	LPDDR4X-3732 +
technology	CMOS +
thread count	10 +
used by	Meizu Pro 7 + and Meizu Pro 7 Plus +
user equipment category	10 +
word size	64 bit (8 octets, 16 nibbles) +