Editing intel/xeon e5

{{intel title|Xeon E5}}
{{ic family
| extended family   = 
| title             = Intel Xeon E5
| image             = 
| caption           = 
| no image          = Yes
| developer         = Intel
| manufacturer      = Intel
| type              = Microprocessors
| first announced   = April 5, 2011
| first launched    = April 5, 2011
| production start  = 
| production end    = 
| arch              = Multi-socket server microprocessors
| isa               = x86-64
| microarch         = Westmere
| microarch 2       = Ivy Bridge
| microarch 3       = Haswell
| microarch 4       = Broadwell
| word              = 64 bit
| proc              = 32 nm
| proc 2            = 22 nm
| proc 3            = 14 nm
| proc 4            = 
| tech              = CMOS
| tech 2            = 
| clock min         = 1700 MHz
| clock max         = 3400 MHZ
| package           = FCLGA-2011-v3
| package 2         = 
| socket            = LGA-2011-v3
| socket 2          = 

| succession       = <!-- yes for succession info -->
| predecessor      = 
| predecessor link = 
| successor        = 
| successor link   = 
}}
'''Xeon E5''' is a family of mid-range enterprise-level [[x86]] microprocessors. These server processors offer high performance, multi-socket configuration support, and an extensive set of features. Various models are also used as high-end workstation microprocessors.

== Members ==
=== Westmere EP ===
{{see also|intel/microarchitectures/westmere|l1=Westmere µarch}}
{{empty section}}

=== Ivy Bridge EP (v2) ===
{{main|intel/microarchitectures/ivy bridge|l1=Ivy Bridge µarch}}
{{empty section}}

=== Haswell EP (v3) ===
{{main|intel/microarchitectures/haswell|l1=Haswell µarch}}
{{empty section}}

=== Broadwell EP (v4) ===
{{main|intel/microarchitectures/broadwell|l1=Broadwell µarch}}
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<table class="wikitable sortable">
<tr><th colspan="13" style="background:#D6D6FF;">Broadwell EP-based Xeon E5 Models</th></tr>
<tr><th colspan="13">Main processor</th></tr>
<tr><th>Model</th><th>Launched</th><th>Release Price</th><th>Sockets</th><th>Cores</th><th>Threads</th><th>L3$</th><th>Freq</th><th>Turbo Freq</th><th>TDP</th><th>Max Mem</th><th>HT</th><th>vPro</th></tr>
{{table sep|col=13|text=4S Environments}}
{{#ask: [[Category:microprocessor models by intel]][[microprocessor family::Xeon E5]][[microarchitecture::Broadwell]][[max cpu count::4]]
 |?full page name
 |?model number
 |?first launched
 |?release price
 |?max cpu count
 |?core count
 |?thread count
 |?l3$ size
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?tdp
 |?max memory#TB
 |?has simultaneous multithreading
 |?has intel vpro technology
 |format=template
 |template=proc table 3
 |userparam=14:13
 |mainlabel=-
}}
{{table sep|col=13|text=2S Environments}}
{{#ask: [[Category:microprocessor models by intel]][[microprocessor family::Xeon E5]][[microarchitecture::Broadwell]][[max cpu count::2]]
 |?full page name
 |?model number
 |?first launched
 |?release price
 |?max cpu count
 |?core count
 |?thread count
 |?l3$ size
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?tdp
 |?max memory#TB
 |?has simultaneous multithreading
 |?has intel vpro technology
 |format=template
 |template=proc table 3
 |userparam=14:13
 |mainlabel=-
}}
{{table sep|col=13|text=1S Environments}}
{{#ask: [[Category:microprocessor models by intel]][[microprocessor family::Xeon E5]][[microarchitecture::Broadwell]][[max cpu count::1]]
 |?full page name
 |?model number
 |?first launched
 |?release price
 |?max cpu count
 |?core count
 |?thread count
 |?l3$ size
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?tdp
 |?max memory#TB
 |?has simultaneous multithreading
 |?has intel vpro technology
 |format=template
 |template=proc table 3
 |userparam=14:13
 |mainlabel=-
}}
{{table count|col=13|ask=[[Category:microprocessor models by intel]][[microprocessor family::Xeon E5]][[microarchitecture::Broadwell]]}}
</table>

== See Also ==
* {{intel|Xeon}}
** {{intel|Xeon E7}}
** {{intel|Xeon E3}}
* {{amd|Opteron}}
designer	Intel +
first announced	April 5, 2011 +
first launched	April 5, 2011 +
full page name	intel/xeon e5 +
instance of	microprocessor family +
instruction set architecture	x86-64 +
main designer	Intel +
manufacturer	Intel +
microarchitecture	Westmere +, Ivy Bridge +, Haswell + and Broadwell +
name	Intel Xeon E5 +
package	FCLGA-2011-v3 +
process	32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
socket	LGA-2011-v3 +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +