Editing amd/k6-iii+/amd-k6-iiie+-500acr

{{amd title|AMD-K6-IIIE+/500ACR}}
{{mpu
| name                = AMD-K6-IIIE+/500ACR
| no image            = Yes
| image               = 
| image size          = 
| caption             = 
| designer            = AMD
| manufacturer        = AMD
| model number        = AMD-K6-IIIE+/500ACR
| part number         = AMD-K6-IIIE+/500ACR
| part number 1       = 
| part number 2       = 
| part number 3       = 
| market              = Embedded
| first announced     = September 25, 2000
| first launched      = September 25, 2000
| last order          = 
| last shipment       = 

| family              = K6-III+
| series              = K6-III+ Embedded
| locked              = 
| frequency           = 499.99 MHz
| bus type            = FSB
| bus speed           = 99.99 MHz
| bus rate            = 99.99 MT/s
| clock multiplier    = 5
| cpuid               = 5D0

| microarch           = K6-III
| platform            = Super 7
| chipset             = 
| core name           = 
| core family         = 5
| core model          = 13
| core stepping       = 0
| core stepping 2     = 1
| core stepping 3     = 2
| core stepping 4     = 3
| process             = 0.18 µm
| transistors         = 21,400,000
| technology          = CMOS
| die area            = <!-- XX mm² -->
| die width           = 
| die length          = 
| word size           = 32 bit
| core count          = 1
| thread count        = 1
| max cpus            = 1
| max memory          = 4 GB

| electrical          = Yes
| power               = 
| v core              = 2.0 V
| v core tolerance    = 0.1 V
| v io                = 3.3675 V
| v io tolerance      = 7%
| sdp                 = 
| tdp                 = 14.5 W
| temp min            = 
| temp max            = 
| tjunc min           = 
| tjunc max           = 
| tcase min           = 0 °C
| tcase max           = 70 °C
| tstorage min        = -65 °C
| tstorage max        = 150 °C

| packaging           = Yes
| package 0           = CPGA-321
| package 0 type      = CPGA
| package 0 pins      = 321
| package 0 pitch     = 1.27 mm
| package 0 width     = 49.53 mm
| package 0 length    = 49.53 mm
| package 0 height    = 3.27 mm
| socket 0            = Super 7
| socket 0 type       = PGA-321
| socket 0 2          = Socket 7
| socket 0 2 type     = PGA-321
}}
'''AMD-K6-IIIE+/500ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5. This chip had a TDP of 14.5 W.

== Cache ==
{{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}}
[[L3$]] can be 512 KB to 2 MB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip.
{{cache info
|l1i cache=32 KB
|l1i break=1x32 KB
|l1i desc=2-way set associative
|l1i extra=
|l1d cache=32 KB
|l1d break=1x32 KB
|l1d desc=2-way set associative
|l1d extra=
|l2 cache=256 KB
|l2 break=1x256
|l2 desc=4-way set associative
|l2 extra=(shared)
|l3 cache=
|l3 break=
|l3 desc=
|l3 extra=
}}

== Graphics ==
This SoC has no integrated graphics processing unit.

== Features ==
{{mpu features
| mmx         = Yes
| emmx        = Yes
| 3dnow       = Yes
| e3dnow      = Yes
| pownow      = Yes
}}
* Auto-power down state
* Stop clock state
* Halt state
base frequency	499.99 MHz (0.5 GHz, 499,990 kHz) +
bus rate	99.99 MT/s (0.1 GT/s, 99,990 kT/s) +
bus speed	99.99 MHz (0.1 GHz, 99,990 kHz) +
bus type	FSB +
clock multiplier	5 +
core count	1 +
core family	5 +
core model	13 +
core stepping	0 +, 1 +, 2 + and 3 +
core voltage	2 V (20 dV, 200 cV, 2,000 mV) +
core voltage tolerance	0.1 V +
cpuid	5D0 +
designer	AMD +
family	K6-III+ +
first announced	September 25, 2000 +
first launched	September 25, 2000 +
full page name	amd/k6-iii+/amd-k6-iiie+-500acr +
instance of	microprocessor +
io voltage	3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) +
io voltage tolerance	7% +
l1d$ description	2-way set associative +
l1d$ size	32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description	2-way set associative +
l1i$ size	32 KiB (32,768 B, 0.0313 MiB) +
l2$ description	4-way set associative +
l2$ size	0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate	September 25, 2000 +
manufacturer	AMD +
market segment	Embedded +
max case temperature	343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count	1 +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature	423.15 K (150 °C, 302 °F, 761.67 °R) +
microarchitecture	K6-III +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	208.15 K (-65 °C, -85 °F, 374.67 °R) +
model number	AMD-K6-IIIE+/500ACR +
name	AMD-K6-IIIE+/500ACR +
part number	AMD-K6-IIIE+/500ACR +
platform	Super 7 +
process	180 nm (0.18 μm, 1.8e-4 mm) +
series	K6-III+ Embedded +
smp max ways	1 +
tdp	14.5 W (14,500 mW, 0.0194 hp, 0.0145 kW) +
technology	CMOS +
thread count	1 +
transistor count	21,400,000 +
word size	32 bit (4 octets, 8 nibbles) +