Editing intel/microarchitectures/kaby lake

{{intel title|Kaby Lake|arch}}
{{microarchitecture
| name             = Kaby Lake
| designer         = Intel
| manufacturer     = Intel
| introduction     = August 30, 2016
| phase-out        = 
| process          = 14 nm
| cores            = 2
| cores 2          = 4
| cores 3          = 6
| cores 4          = 8
| cores 5          = 10
| cores 6          = 16
| cores 7          = 32

| pipeline         = Yes
| type             = Superscalar
| OoOE             = Yes
| speculative      = Yes
| renaming         = Yes
| isa              = IA-32
| isa 2            = x86-64
| stages min       = 14
| stages max       = 19
| issues           = 4

| inst             = Yes
| feature          = 
| extension        = MOVBE
| extension 2      = MMX
| extension 3      = SSE
| extension 4      = SSE2
| extension 5      = SSE3
| extension 6      = SSSE3
| extension 7      = SSE4.1
| extension 8      = SSE4.2
| extension 9      = POPCNT
| extension 10     = AVX
| extension 11     = AVX2
| extension 12     = AES
| extension 13     = PCLMUL
| extension 14     = FSGSBASE
| extension 15     = RDRND
| extension 16     = FMA3
| extension 17     = F16C
| extension 18     = BMI
| extension 19     = BMI2
| extension 20     = VT-x
| extension 21     = VT-d
| extension 22     = TXT
| extension 23     = TSX
| extension 24     = RDSEED
| extension 25     = ADCX
| extension 26     = PREFETCHW
| extension 27     = CLFLUSHOPT
| extension 28     = XSAVE
| extension 29     = SGX
| extension 30     = MPX
| extension 31     = AVX-512

| core names       = Yes
| core name        = Kaby Lake Y
| core name 2      = Kaby Lake U
| core name 3      = Kaby Lake H
| core name 4      = Kaby Lake S
| core name 5      = Kaby Lake X
| core name 6      = Kaby Lake W

| succession       = Yes
| predecessor      = Skylake
| predecessor link = intel/microarchitectures/skylake
| successor        = Coffee Lake
| successor link   = intel/microarchitectures/coffee lake
| successor 2      = Cannonlake
| successor 2 link = intel/microarchitectures/cannonlake
}}
'''Kaby Lake''' ('''KBL''') is [[Intel]]'s successor to {{\\|Skylake}}, a [[14 nm process]] [[microarchitecture]] for mainstream desktops, servers, and mobiles. Originally set to be fabricated using [[10 nm process]], Intel late revised it to [[14 nm]] due to serious delays with {{\\|Broadwell}}. Kaby Lake is the first "Optimization" released as part of Intel's {{intel|PAO}} model. The microarchitecture was developed by Intel's R&D center in [[wikipedia:Haifa, Israel|Haifa, Israel]]. 

For desktop and mobile, Kaby Lake is branded as 7th Generation Intel {{intel|Core}} processors. For server class processors, Intel branded it as {{intel|Xeon E3|Xeon E3 v6}}, {{intel|Xeon E5|Xeon E5 v6}}, and {{intel|Xeon E7|Xeon E7 v6}}.

== Codenames ==
{| class="wikitable"
|-
! Core !! Abbrev !! Graphics !! Target
|-
| Kaby Lake Y || KBL-Y || GT2 || 2-in-1s detachable, tablets, and computer sticks
|-
| Kaby Lake U || KBL-U || GT2/GT3 || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room
|-
| Kaby Lake H || KBL-H || GT2/GT4 || Ultimate mobile performance, mobile workstations
|-
| Kaby Lake S || KBL-S || GT2/GT4 || Desktop performance to value, AiOs, and minis
|-
| Kaby Lake X || KBL-X ||  || High-end desktops & enthusiasts market
|-
| Kaby Lake W || KBL-W ||  || Workstations
|}

== Technology ==
{{main|intel/microarchitectures/broadwell#Technology|l1=Broadwell § Technology}}
Kaby Lake uses a modified and improved [[14 nm process]] used for the Broadwell microarchitecture (And {{\\|Skylake}}). Intel calls the process "14nm+".

== Architecture ==
{{empty section}}

== Die ==
Dual Core Kaby Lake Processor:

: [[File:kaby lake (dual core).png|850px]]


: [[File:kaby lake (dual core) (annotated).png|850px]]


== All Kaby Lake Chips ==
<!-- NOTE: 
           This table is generated automatically from the data in the actual articles.
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           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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<table class="wikitable sortable">
<tr><th colspan="12" style="background:#D6D6FF;">Kaby Lake Chips</th></tr>
<tr><th colspan="9">Main processor</th><th colspan="3">IGP</th></tr>
<tr><th>Model</th><th>µarch</th><th>Platform</th><th>Core</th><th>Launched</th><th>SDP</th><th>TDP</th><th>Freq</th><th>Max Mem</th><th>Name</th><th>Freq</th><th>Max Freq</th></tr>
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Kaby Lake]]
 |?full page name
 |?model number
 |?microarchitecture
 |?platform
 |?core name
 |?first launched
 |?sdp
 |?tdp
 |?base frequency#GHz
 |?max memory#GB
 |?integrated gpu
 |?integrated gpu base frequency
 |?integrated gpu max frequency
 |format=template
 |template=proc table 2
 |searchlabel=
 |userparam=13
 |mainlabel=-
}}
{{table count|col=12|ask=[[Category:microprocessor models by intel]][[instance of::microprocessor]][[microarchitecture::Kaby Lake]]}}
</table>

== Documents ==
* [[:File:7th Generation Intel® Core™ Processor Product Brief.pdf|7th Generation Intel® Core™ Processor Product Brief]]
* [[:File:7th Generation Intel® Core™ Processor Y-Series and U-Series Product Brief.pdf|7th Generation Intel® Core™ Processor Y-Series and U-Series Product Brief]]
* [[:File:7th Gen Intel® Core™ Processor Family Fact Sheet.pdf|7th Gen Intel® Core™ Processor Family Fact Sheet]]
codename	Kaby Lake +
core count	2 + and 4 +
designer	Intel +
first launched	August 30, 2016 +
full page name	intel/microarchitectures/kaby lake +
instance of	microarchitecture +
instruction set architecture	x86-64 +
manufacturer	Intel +
microarchitecture type	CPU +
name	Kaby Lake +
pipeline stages (max)	19 +
pipeline stages (min)	14 +
process	14 nm (0.014 μm, 1.4e-5 mm) +