Editing intrinsity/fastmath/fastmath-2

{{intrinsity title|FastMATH 2 GHz}}
The '''FastMATH 2 GHz''' was the flagship microprocessor developed by [[Intrinsity]] operating at 2 GHz. The processor incorporates a high-performance [[MIPS]] CPU along with a powerful matrix and vector math unit.
base frequency	2,000 MHz (2 GHz, 2,000,000 kHz) +
bus rate	4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus speed	500 MHz (0.5 GHz, 500,000 kHz) +
bus type	RapidIO +
core count	1 +
core voltage	1 V (10 dV, 100 cV, 1,000 mV) +
designer	Intrinsity +
family	FastMATH +
first announced	2001 +
first launched	2002 +
full page name	intrinsity/fastmath/fastmath-2 +
has feature	JTAG +
instance of	microprocessor +
l1d$ description	256 blocks × 16 words/block +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	256 blocks × 16 words/block +
l1i$ size	16 KiB (16,384 B, 0.0156 MiB) +
l2$ description	4-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldate	2002 +
manufacturer	TSMC +
market segment	Embedded +
max memory	1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) +
microarchitecture	FashMATH +
model number	FastMATH-2 +
name	FastMATH 2 GHz +
power dissipation	15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
process	130 nm (0.13 μm, 1.3e-4 mm) +
technology	Dynamic CMOS +
thread count	1 +
word size	32 bit (4 octets, 8 nibbles) +