Editing intel/80486/486sx2-50

{{intel title|i486SX2-50}}
{{mpu
| name                = Intel i486SX2-50
| image               = Ic-photo-intel-A80486SX2-50-(486SX2).png
| image size          = 
| caption             = A80486SX2-50, S-Spec SX845
| designer            = Intel
| manufacturer        = Intel
| model number        = i486SX2-50
| part number         = A80486SX2-50
| part number 2       = A80486SX250
| market              = 
| first announced     = 
| first launched      = 
| last order          = 
| last shipment       = 

| family              = 80486
| series              = 486SX2
| locked              = 
| frequency           = 50 MHz
| bus type            = FSB
| bus speed           = 25 MHz
| bus rate            = 25 MT/s
| clock multiplier    = 2
| s-spec              = SX845
| s-spec es           = 
| s-spec qs           = Q0498
| s-spec qs 2         = Q0576
| cpuid               = 45B

| microarch           = 80486
| platform            = 
| chipset             = 
| core name           = 486SX2
| core family         = 
| core model          = 
| core stepping       = 
| process             = 800 nm
| transistors         = 900,000
| technology          = CMOS
| die size            = 
| word size           = 32 bit
| core count          = 1
| max cpus            = 1
| max memory          = 4 GB

| electrical          = Yes
| power               = 3.08 W
| v core              = 5 V
| v core tolerance    = 5%
| temp max            = 85 °C
| temp min            = 0 °C

| packaging           = Yes
| package             = CPGA-168
| package type        = 
| package size        = 
| socket              = Socket 1 
| socket 2            = Socket 2
| socket 3            = Socket 3
}}
'''i486SX2-50''' was a fourth-generation [[x86]] [[microprocessor]] introduced by [[Intel]] in the early 1990s. This chip, which is based on the {{intel|microarchitectures/80486|80486 microarchitecture}}, had a clock doubler operating at 50 MHz, twice the bus speed. In contrast to the i486DX chips, the i486SX line had no functional [[FPU]] on-die.

== Cache ==
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
{{cache info
|l1 cache=8 KB
|l1 break=1x8 KB
|l1 desc=4-way set associative
|l1 extra=(unified, write-through policy)
}}

== Graphics ==
This chip had no integrated graphics processing unit.

== Features ==
* {{intel|System Management Mode}} (SMM)

== See also ==
* {{intel|80486|80486 family}}
base frequency	50 MHz (0.05 GHz, 50,000 kHz) +
bus rate	25 MT/s (0.025 GT/s, 25,000 kT/s) +
bus speed	25 MHz (0.025 GHz, 25,000 kHz) +
bus type	FSB +
clock multiplier	2 +
core count	1 +
core name	486SX2 +
core voltage	5 V (50 dV, 500 cV, 5,000 mV) +
core voltage tolerance	5% +
cpuid	45B +
designer	Intel +
family	80486 +
full page name	intel/80486/486sx2-50 +
instance of	microprocessor +
l1$ description	4-way set associative +
l1$ size	8 KiB (8,192 B, 0.00781 MiB) +
ldate	1900 +
main image	+
main image caption	A80486SX2-50, S-Spec SX845 +
manufacturer	Intel +
max cpu count	1 +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature	85 °C +
microarchitecture	80486 +
min operating temperature	0 °C +
model number	i486SX2-50 +
name	Intel i486SX2-50 +
part number	A80486SX2-50 + and A80486SX250 +
power dissipation	3.08 W (3,080 mW, 0.00413 hp, 0.00308 kW) +
process	800 nm (0.8 μm, 8.0e-4 mm) +
s-spec	SX845 +
s-spec (qs)	Q0498 + and Q0576 +
series	486SX2 +
smp max ways	1 +
technology	CMOS +
transistor count	900,000 +
word size	32 bit (4 octets, 8 nibbles) +