Editing intel/core i5/i5-4670r

{{intel title|i5-4670R}}
{{mpu
| name               = Intel Core i5-4670R
| image              = 
| image size         = 
| no image           = yes
| caption            = 
| manufacturer       = Intel
| model number       = i5-4670R
| part number        = CL8064701508403
| market             = Desktop
| first announced    = June 2, 2013
| first launched     = June 4, 2013
| last order         = 
| last shipment      = 

| family             = Core i5
| locked             = Yes
| frequency          = 3000 MHz
| turbo frequency    = yes
| turbo frequency1   = 3700 MHz
| turbo frequency2   = 3600 MHz
| turbo frequency3   = 3500 MHz
| turbo frequency4   = 3500 MHz
| bus type           = DMI 2.0
| bus speed          = 5 GT/s
| clock multiplier   = 30
| s-spec             = SR18M

| microarch          = Haswell 
| platform           = 
| core name          = 
| core family        = 06
| core model         = 46
| core stepping      = C0
| process            = 22 nm
| die size           = 
| word size          = 64 bits
| core count         = 4
| thread count       = 4
| max cpus           = 1
| max memory         = 32 GB

| electrical         = Yes
| tdp                = 65 W
| temp max           = 71.35 C

| packaging          = Yes
| package            = FCBGA1364
| package type       = FCBGA
| package pitch      = 
| package size       = 37.5mm x 32mm x 1.65mm
| socket             = BGA1364
| socket type        = BGA
}}
The '''Intel Core i5-4670R''' is a [[quad core]] [[64-bit architecture|64-bit]] desktop [[microprocessor]] released by [[Intel]] in 2013. The microprocessor is based on the [[Haswell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.

== Cache ==
This specific microprocessor includes the [[has feature::Crystal Well]] cache.
{{cache info
|l1i cache=128 KB
|l1i break=4x32 KB
|l1i desc=8-way set associative
|l1i extra=(per core, write-back)
|l1d cache=128 KB
|l1d break=4x32 KB
|l1d desc=8-way set associative
|l1d extra=(per core, write-back)
|l2 cache=1 MB
|l2 break=4x256 KB
|l2 desc=8-way set associative
|l2 extra=(per core, write-back)
|l3 cache=4 MB
|l3 desc=12-way set associative
|l3 extra=(shared)
|l4 cache=128 MB
|l4 desc=16-way set associative
|l4 extra=(see {{intel|Crystal Well}})
}}

== Graphics ==
{{integrated graphic
| gpu                = Intel Iris Pro Graphics 5200
| displays           = 3
| frequency          = 200 MHz
| max frequency      = 1300 MHz
| max memory         = 1700 MB
| output edp         = Yes
| output dp          = Yes
| output hdmi        = Yes
| output vga         = Yes
| directx ver        = 11.1
| opengl ver         = 4.3
| max res hdmi       = 3840x2160
| max res hdmi freq  = 60 Hz
| max res dp         = 3840x2160
| max res dp freq    = 60 Hz
| max res vga        = 2880x1800
| max res vga freq   = 60 Hz
}}

== Memory controller ==
{{integrated memory controller
| type               = DDR3-1333
| type 1             = DDR3L-1333
| type 2             = DDR3-1600
| type 3             = DDR3L-1600
| controllers        = 1
| channels           = 2
| ecc support        = No
| max bandwidth      = 25,600 MB/s
| max memory         = 32,768 MB
}}

== Features ==
{{mpu features
| em64t     = Yes
| nx        = Yes
| txt       = 
| tsx       = 
| ht        = 
| tbt2      = Yes
| vt-x      = Yes
| vt-d      = Yes
| mmx       = Yes
| sse       = Yes
| sse2      = Yes
| sse3      = Yes
| ssse3     = Yes
| sse4      = Yes
| sse4.1    = Yes
| sse4.2    = Yes
| aes       = Yes
| avx       = Yes
| avx2      = Yes
| bmi       = Yes
| bmi1      = Yes
| bmi2      = Yes
| f16c      = Yes
| fma3      = Yes
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i5-4670R - Intel#package +
base frequency	3,000 MHz (3 GHz, 3,000,000 kHz) +
bus rate	5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus type	DMI 2.0 +
clock multiplier	30 +
core count	4 +
core family	06 +
core model	46 +
core stepping	C0 +
designer	Intel +
family	Core i5 +
first announced	June 2, 2013 +
first launched	June 4, 2013 +
full page name	intel/core i5/i5-4670r +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has feature	Crystal Well +, integrated gpu +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 + and Advanced Encryption Standard Instruction Set Extension +
has intel turbo boost technology 2 0	true +
has locked clock multiplier	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	Intel Iris Pro Graphics 5200 +
integrated gpu base frequency	200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu max frequency	1,300 MHz (1.3 GHz, 1,300,000 KHz) +
integrated gpu max memory	1,700 MiB (1,740,800 KiB, 1,782,579,200 B, 1.66 GiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	8-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	12-way set associative +
l3$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l4$ description	16-way set associative +
l4$ size	128 MiB (131,072 KiB, 134,217,728 B, 0.125 GiB) +
ldate	June 4, 2013 +
manufacturer	Intel +
market segment	Desktop +
max cpu count	1 +
max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max operating temperature	71.35 C +
microarchitecture	Haswell +
model number	i5-4670R +
name	Intel Core i5-4670R +
package	FCBGA-1364 +
part number	CL8064701508403 +
process	22 nm (0.022 μm, 2.2e-5 mm) +
s-spec	SR18M +
smp max ways	1 +
tdp	65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
thread count	4 +
turbo frequency (1 core)	3,700 MHz (3.7 GHz, 3,700,000 kHz) +
turbo frequency (2 cores)	3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (3 cores)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
turbo frequency (4 cores)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +