Editing intel/xeon d/d-1571

{{intel title|Xeon D-1571}}
{{mpu
| name                = Intel Xeon D-1571
| image               = 
| image size          = 
| no image            = Yes
| caption             = 
| manufacturer        = Intel
| model number        = D-1571
| part number         = GG8067402570310
| market              = Server
| first announced     = February 24, 2016
| first launched      = February 24, 2016
| last order          = 
| last shipment       = 

| family              = Xeon D
| series              = D-1500
| locked              = Yes
| frequency           = 1300 MHz
| turbo frequency     = Yes
| turbo frequency1    = 2100 MHz
| turbo frequency2    = 
| turbo frequency3    = 
| turbo frequency4    = 
| bus type            = 
| bus speed           = 
| clock multiplier    =
| s-spec              = SR2M0
| s-spec qs           = 
| s-spec es           = 
| cpuid               = 

| microarch           = Broadwell
| platform            = 
| core name           = Broadwell
| core stepping       = Y0
| process             = 14 nm
| transistors         = 
| technology          = CMOS
| die size            = 
| word size           = 64 bit
| core count          = 16
| thread count        = 32
| max cpus            = 1
| max memory          = 128 GB

| electrical          = Yes
| sdp                 = 
| tdp                 = 45 W
| ctdp down           = 
| ctdp down frequency =
| ctdp up             =
| temp max            = 108 °C
| temp min            = 0 °C

| packaging           = Yes
| package             = FCBGA1667
| package type        = FCBGA
| package pitch       = 
| package size        = 3.75cm x 3.75cm
| socket              = BGA1667
| socket type         = BGA
}}
The '''{{intel|Xeon D}}-1571''' is a {{arch|64}} hexadeca-core [[x86-64]] microserver SoC that was introduced by [[Intel]] in February of 2016. The D-1571 operates at 1.3 GHz with a turbo frequency of 2.1 GHz. This chip, which is based on the [[intel/microarchitectures/broadwell|Broadwell]] [[microarchitecture]] and manufactured in [[14 nm process]], has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4).

== Cache ==
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell's Cache}}
{{cache info
|l1i cache=512 KB
|l1i break=16x32 KB
|l1i desc=8-way set associative
|l1i extra=(per core)
|l1d cache=512 KB
|l1d break=16x32 KB
|l1d desc=8-way set associative
|l1d extra=(per core)
|l2 cache=4 MB
|l2 break=16x256 KB
|l2 desc=8-way set associative
|l2 extra=(per core)
|l3 cache=24 MB
|l3 break=16x1.5 MB
|l3 desc=
|l3 extra=(per core)
}}

== Graphics ==
This SoC has no integrated graphics processing unit.

== Memory controller ==
{{integrated memory controller
| type               = DDR3L-1333
| type 2             = DDR3L-1600
| type 3             = DDR4-1600
| type 4             = DDR4-1867
| type 5             = DDR4-2133
| controllers        = 1
| channels           = 2
| ecc support        = Yes
| max bandwidth      = 
| bandwidth schan    = 
| bandwidth dchan    = 
| max memory         = 128 GB
}}

== Expansions ==
{{mpu expansions
| pcie revision      = 2.0
| pcie revision 2    = 3.0
| pcie lanes         = 8
| pcie lanes 2       = 32
| pcie config        = x4
| pcie config 1      = x8
| pcie config 2      = x16
| usb revision       = 2.0
| usb revision 2     = 3.0
| usb ports          = 8
| sata ports         = 6
| integrated lan     = Yes
| uart               = Yes
}}

== Networking ==
{{soc networking
| SFI interface     = Yes
| KR interface      = No
| KR4 Interface     = No
| KX Interface      = Yes
| KX4 Interface     = No
| 10Base-T          = No
| 100Base-T         = No
| 1000Base-T        = Yes
| 10GBase-T         = Yes
}}

== Features ==
{{mpu features
| em64t       = Yes
| nx          = Yes
| txt         = Yes
| tsx         = Yes
| ht          = Yes
| tbt2        = Yes
| bpt         = 
| vt-x        = Yes
| vt-d        = Yes
| mmx         = Yes
| sse         = Yes
| sse2        = Yes
| sse3        = Yes
| ssse3       = Yes
| sse4        = Yes
| sse4.1      = Yes
| sse4.2      = Yes
| aes         = Yes
| avx         = Yes
| avx2        = Yes
| bmi         = Yes
| bmi1        = Yes
| bmi2        = Yes
| f16c        = Yes
| fma3        = Yes
| sgx         = 
| eist        = Yes
| secure key  = Yes
| os guard    = Yes
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon D-1571 - Intel#pcie +
back image	+
base frequency	1,300 MHz (1.3 GHz, 1,300,000 kHz) +
bus type	DMI 2.0 +
clock multiplier	13 +
core count	16 +
core family	6 +
core model	6 +
core name	Broadwell DE +
core stepping	Y0 +
designer	Intel +
die area	306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) +
family	Xeon D +
first announced	February 24, 2016 +
first launched	February 24, 2016 +
full page name	intel/xeon d/d-1571 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Trusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technology	true +
has intel secure key technology	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l1d$ description	8-way set associative +
l1d$ size	512 KiB (524,288 B, 0.5 MiB) +
l1i$ description	8-way set associative +
l1i$ size	512 KiB (524,288 B, 0.5 MiB) +
l2$ description	8-way set associative +
l2$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description	16-way set associative +
l3$ size	24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
ldate	February 24, 2016 +
main image	+
manufacturer	Intel +
market segment	Server + and Embedded +
max cpu count	1 +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels	2 +
max operating temperature	108 °C +
max sata ports	6 +
max usb ports	4 +
microarchitecture	Broadwell +
min operating temperature	0 °C +
model number	D-1571 +
name	Xeon D-1571 +
package	FCBGA-1667 +
part number	GG8067402570310 +
platform	Grangeville +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 1,222.00 (€ 1,099.80, £ 989.82, ¥ 126,269.26) +
release price (tray)	$ 1,222.00 (€ 1,099.80, £ 989.82, ¥ 126,269.26) +
s-spec	SR2M0 +
series	D-1500 +
smp max ways	1 +
supported memory type	DDR4-2400 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technology	CMOS +
thread count	32 +
transistor count	4,700,000,000 +
turbo frequency (1 core)	2,100 MHz (2.1 GHz, 2,100,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +