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UltraSPARC-I 143MHz - Sun Microsystems
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UltraSPARC-I 143MHz | ||||||
General Info | ||||||
Designer | Sun Microsystems | |||||
Manufacturer | Texas Instruments | |||||
Model Number | UltraSPARC-I 143MHz | |||||
Part Number | STP103OBGA-143 | |||||
Market | Server, Workstation | |||||
Introduction | October 2, 1995 (announced) October 2, 1995 (launched) | |||||
Release Price | $995 | |||||
General Specs | ||||||
Family | UltraSPARC | |||||
Series | UltraSPARC-I | |||||
Frequency | 143 MHz | |||||
Microarchitecture | ||||||
ISA | SPARC V9 (SPARC) | |||||
Microarchitecture | UltraSPARC-I | |||||
Process | 0.5 µm | |||||
Transistors | 5,200,000 | |||||
Technology | CMOS | |||||
Die | 310 mm² | |||||
Word Size | 64 bit | |||||
Cores | 1 | |||||
Threads | 1 | |||||
Electrical | ||||||
Vcore | 3.3 V | |||||
Packaging | ||||||
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UltraSPARC-I 143MHz was a 64-bit SPARC microprocessor designed and introduced by Sun Microsystems in late 1995.
Cache[edit]
- Main article: UltraSPARC-I § Cache
In addition to the on-chip cache, this chip also required an external cache that is either 512 KiB, 1 MiB, 2 MiB, or 4 MiB with a line size of 64 bytes.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "UltraSPARC-I 143MHz - Sun Microsystems"
l1$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1d$ description | 16-way set associative + |
l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |