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MC14500 ISA - Motorola
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MC14500 ISA
Developer Motorola
Implementation MC14500
Dev model proprietary
Data word size 1 bit
0.125 octets
0.25 nibbles
Instruction word size 4 bit
0.5 octets
Instructions 16
Introduction 1976
Version 1
Format register-memory
Endianness bi-endian
Registers 1
SPRs 1
RR
ISAsBy CompanyBy InstBy Data

The MC14500 ISA is an instruction set architecture used in the MC14500 family of microprocessor. This ISA consists of just 4-bit opcodes forming a total of 16 instructions.

Registers[edit]

The MC14500B has a single register: result register (RR) which always stores the value of the intermediate operation that has been performed. RR can be read directly from pin 15 at any time. RR is also always used as the 2nd operand to any binary ALU operation.

Instruction Set[edit]

MC14500 ISA
Mnemonic Opcode Action
NOPO0x0RR → RR ; Flag 0 → 1
LD0x1Data → RR
LDC0x2Data → RR
AND0x3RR · Data → RR
ANDC0x4RR · Data → RR
OR0x5RR + Data → RR
ORC0x6RR + Data → RR
XNOR0x7If RR = Data, RR → 1
STO0x8RR → Data ; Write → 1
STOC0x9RR → Data ; Write → 1
IEN0xAData → IEN
OEN0xBData → OEN
JMP0xCFlag JMP → 1
RTN0xDFlag RTN → 1
SKZ0xEIf RR = 0, Skip next instruction
NOPF0xFRR → RR ; Flag F → 1

See also[edit]

designerMotorola +
first launched1976 +
full page namemotorola/mc14500/isa +
implementationMC14500 +
instance ofinstruction set architecture +
instruction count16 +
instruction word size4 bit (0.5 octets) +
nameMC14500 +
word size1 bit (0.125 octets, 0.25 nibbles) +