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Intel Pentium P6100
General Info
Designer	Intel
Manufacturer	Intel
Model Number	P6100
Part Number	CP80617004125AL
S-Spec	SLBUR
Market	Mobile
Introduction	September 26, 2010 (announced) September 26, 2010 (launched)
Shop	Amazon
General Specs
Family	Pentium
Series	P6000
Locked	Yes
Frequency	1,999.99 MHz
Bus type	DMI 1.0
Bus rate	1 × 2.5 GT/s
Clock multiplier	15
CPUID	0x20655
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Westmere
Platform	Calpella
Chipset	Ibex Peak
Core Name	Arrandale
Core Family	6
Core Model	37
Core Stepping	K0
Process	32 nm
Transistors	382,000,000
Technology	CMOS
Die	81 mm²
Word Size	64 bit
Cores	2
Threads	2
Max Memory	8 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	35 W
Tjunction	0 °C – 90 °C
Tstorage	-25 °C – 125 °C
Packaging
Package rPGA-988A (rPGA) Dimension 36 mm x 35 mm x 2.12 mm Pitch 1 mm Pin Count 988 Socket Socket-G1 (PGA)
Package BGA-1288 (BGA) Dimension 34 mm x 28 mm x 2.1 mm Pitch 0.7 mm Pin Count 1288

Pentium P6100 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 2.00 GHz and a TDP of 35 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 128 KiB 131,072 B 0.125 MiB L1I$ 64 KiB 65,536 B 0.0625 MiB 2x32 KiB 4-way set associative write-back L1D$ 64 KiB 65,536 B 0.0625 MiB 2x32 KiB 8-way set associative write-back L2$ 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB     2x256 KiB 8-way set associative write-back L3$ 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB     2x1.5 MiB 12-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR3 12800s Supports ECC No Max Mem 8 GiB Controllers 1 Channels 2 Max Bandwidth 15.88 GiB/s 16,261.12 MiB/s 17.051 GB/s 17,051.02 MB/s 0.0155 TiB/s 0.0171 TB/s Bandwidth Single 7.942 GiB/s Double 15.88 GiB/s Physical Address (PAE) 36 bit

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCIe Revision 2.0 Max Lanes 16 Configs 1x16

Graphics

[Edit/Modify IGP Info]

	Integrated Graphics Information
	GPU HD Graphics (Ironlake) Designer Intel Device ID 0x0046 Execution Units 12 Max Displays 2 Frequency 500 MHz 0.5 GHz 500,000 KHz Burst Frequency 667 MHz 0.667 GHz 667,000 KHz Standards DirectX 10.1 OpenGL 2.1 Additional Features Intel Flexible Display Interface (FDI) Intel Clear Video

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute EIST Enhanced SpeedStep Technology Flex Memory Flex Memory Access FMA Fast Memory Access (w\ GMCH)