From WikiChip
Celeron B800 - Intel
< intel‎ | celeron(Redirected from intel celeron b800)

Edit Values
Celeron B800
General Info
DesignerIntel
ManufacturerIntel
Model NumberB800
Part NumberFF8062701142600
S-SpecSR0EW
MarketMobile
IntroductionJune, 2011 (announced)
June, 2011 (launched)
Release Price$80.00
ShopAmazon
General Specs
FamilyCeleron
Series800
LockedYes
Frequency1,500 MHz
Bus typeDMI 2.0
Bus rate4 × 5 GT/s
Clock multiplier15
CPUID0x206A7
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSandy Bridge
PlatformSandy Bridge M
ChipsetCougar Point
Core NameSandy Bridge M
Core Family6
Core Model42
Core SteppingQ0
Process32 nm
Transistors504,000,000
TechnologyCMOS
Die131 mm²
Word Size64 bit
Cores2
Threads2
Max Memory16 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power (idle)3.1 W
Vcore0.3 V-1.52 V
TDP35 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackagerPGA988B (PGA)
Dimension37.5 mm x 37.5 mm
Pitch1 mm
Contacts988
SocketSocket G2

Celeron B800 is a dual-core budget mobile x86 microprocessor introduced by Intel in mid-2011. The Celeron B800, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.5 GHz with a TDP of 35 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 650 MHz with a burst frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back

L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB8-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333, DDR3-1066
Supports ECCNo
Max Mem16 GiB
Controllers1
Channels2
Max Bandwidth19.87 GiB/s
20,346.88 MiB/s
21.335 GB/s
21,335.25 MB/s
0.0194 TiB/s
0.0213 TB/s
Bandwidth
Single 9.93 GiB/s
Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 2.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics (Sandy Bridge)
DesignerIntelDevice ID0x0106
Execution Units6Max Displays2
Frequency650 MHz
0.65 GHz
650,000 KHz
Burst Frequency1,000 MHz
1 GHz
1,000,000 KHz
OutputDP, eDP, HDMI, SDVO, CRT

Standards
DirectX10.1
OpenGL3.1
DP1.1
eDP1.1
HDMI1.4

Additional Features
Intel Flexible Display Interface (FDI)

Features[edit]

Documents[edit]

Datasheet[edit]

Other[edit]

Facts about "Celeron B800 - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron B800 - Intel#package + and Celeron B800 - Intel#pcie +
base frequency1,500 MHz (1.5 GHz, 1,500,000 kHz) +
bus links4 +
bus rate5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus typeDMI 2.0 +
chipsetCougar Point +
clock multiplier15 +
core count2 +
core family6 +
core model42 +
core nameSandy Bridge M +
core steppingQ0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.3 V (3 dV, 30 cV, 300 mV) +
cpuid0x206A7 +
designerIntel +
device id0x0106 +
die area131 mm² (0.203 in², 1.31 cm², 131,000,000 µm²) +
familyCeleron +
first announcedJune 2011 +
first launchedJune 2011 +
full page nameintel/celeron/b800 +
has ecc memory supportfalse +
has featureIntel VT-x +, Flex Memory Access + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Sandy Bridge) +
integrated gpu base frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units6 +
integrated gpu max frequency1,000 MHz (1 GHz, 1,000,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateJune 2011 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSandy Bridge +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberB800 +
nameCeleron B800 +
packagerPGA988B +
part numberFF8062701142600 +
platformSandy Bridge M +
power dissipation (idle)3.1 W (3,100 mW, 0.00416 hp, 0.0031 kW) +
process32 nm (0.032 μm, 3.2e-5 mm) +
release price$ 80.00 (€ 72.00, £ 64.80, ¥ 8,266.40) +
s-specSR0EW +
series800 +
smp max ways1 +
socketSocket G2 +
supported memory typeDDR3-1333 + and DDR3-1066 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count2 +
transistor count504,000,000 +
word size64 bit (8 octets, 16 nibbles) +