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Xeon E7-4807 - Intel
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Xeon E7-4807 | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Model Number | E7-4807 | |||||||||||
Part Number | AT80615006432AB | |||||||||||
S-Spec | SLC3L | |||||||||||
Market | Server | |||||||||||
Introduction | April 5, 2011 (announced) April 5, 2011 (launched) | |||||||||||
End-of-life | August 21, 2015 (last order) February 5, 2016 (last shipment) | |||||||||||
Release Price | $890.00 | |||||||||||
Shop | Amazon | |||||||||||
General Specs | ||||||||||||
Family | Xeon E7 | |||||||||||
Series | E7-4800 | |||||||||||
Locked | Yes | |||||||||||
Frequency | 1,866.66 MHz | |||||||||||
Bus type | QPI | |||||||||||
Bus rate | 4.80 GT/s | |||||||||||
Clock multiplier | 14 | |||||||||||
CPUID | 206F2 | |||||||||||
Microarchitecture | ||||||||||||
Microarchitecture | Westmere | |||||||||||
Platform | Boxboro | |||||||||||
Chipset | Boxboro | |||||||||||
Core Name | Westmere EX | |||||||||||
Core Family | 6 | |||||||||||
Core Model | 47 | |||||||||||
Core Stepping | A2 | |||||||||||
Process | 32 nm | |||||||||||
Transistors | 2,600,000,000 | |||||||||||
Technology | CMOS | |||||||||||
Die | 513 mm² | |||||||||||
Word Size | 64 bit | |||||||||||
Cores | 6 | |||||||||||
Threads | 12 | |||||||||||
Max Memory | 2 TiB | |||||||||||
Multiprocessing | ||||||||||||
Max SMP | 4-Way (Multiprocessor) | |||||||||||
Electrical | ||||||||||||
Vcore | 1.35 V | |||||||||||
TDP | 95 W | |||||||||||
Tcase | 5 °C – 70 °C | |||||||||||
Tstorage | -40 °C – 85 °C | |||||||||||
Packaging | ||||||||||||
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Xeon E7-4807 is a 64-bit hexa-core x86 data center microprocessor that supports up to 4 sockets. This first generation (Westmere-based) Xeon E7 processor operates at 1.86 GHz with 95 W TDP but does not support turbo boost technology. This processor supports up to 4 channels of DDR3, supporting up to 2 TB of memory.
Contents
Cache[edit]
- Main article: Westmere § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
Integrated Memory Controller
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Xeon E7-4807 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E7-4807 - Intel#package + |
base frequency | 1,866.66 MHz (1.867 GHz, 1,866,660 kHz) + |
bus rate | 4,800 MT/s (4.8 GT/s, 4,800,000 kT/s) + |
bus type | QPI + |
chipset | Boxboro + |
clock multiplier | 14 + |
core count | 6 + |
core family | 6 + |
core model | 47 + |
core name | Westmere EX + |
core stepping | A2 + |
core voltage | 1.35 V (13.5 dV, 135 cV, 1,350 mV) + |
cpuid | 206F2 + |
designer | Intel + |
die area | 513 mm² (0.795 in², 5.13 cm², 513,000,000 µm²) + |
family | Xeon E7 + |
first announced | April 5, 2011 + |
first launched | April 5, 2011 + |
full page name | intel/xeon e7/e7-4807 + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d + and Extended Page Tables + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |
last order | August 21, 2015 + |
last shipment | February 5, 2016 + |
ldate | April 5, 2011 + |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
max cpu count | 4 + |
max memory | 2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) + |
max memory bandwidth | 23.84 GiB/s (24,412.16 MiB/s, 25.598 GB/s, 25,598.005 MB/s, 0.0233 TiB/s, 0.0256 TB/s) + |
max memory channels | 4 + |
max storage temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
microarchitecture | Westmere + |
min case temperature | 278.15 K (5 °C, 41 °F, 500.67 °R) + |
min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
model number | E7-4807 + |
name | Xeon E7-4807 + |
package | FCLGA-8 + |
part number | AT80615006432AB + |
platform | Boxboro + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
release price | $ 890.00 (€ 801.00, £ 720.90, ¥ 91,963.70) + |
s-spec | SLC3L + |
series | E7-4800 + |
smp max ways | 4 + |
supported memory type | DDR3-800 + |
tdp | 95 W (95,000 mW, 0.127 hp, 0.095 kW) + |
technology | CMOS + |
thread count | 12 + |
transistor count | 2,600,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |