• intel/microarchitectures/sandy bridge (client)
  |cores=2 |cores 2=4
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/skylake (client)
  |cores=2 |cores 2=4
  79 KB (11,922 words) - 06:46, 11 November 2022
• amd/microarchitectures/zen
  |cores=4 |cores 2=6
  79 KB (12,095 words) - 15:27, 9 June 2023
• amd/microarchitectures/zen 2
  |cores=4 |cores 2=6
  57 KB (8,701 words) - 22:11, 9 October 2022
• pezy/pezy-scx/pezy-sc
  ...troduced in 2014. This chip, which operates at 733 MHz, incorporates 1,024 cores dissipating 100 W. The PEZY-SC powers the [[ZettaScaler]]-1.x series of sup ...upporting 8-way [[simultaneous multithreading|SMT]] for a total of 8,192 [[logical core|threads]]. Operating at 733 MHz, the processor has a peak performance
  4 KB (612 words) - 11:14, 22 September 2018
• amd/phenom ii x3
  ! Model Number !! Arch !! Frequency !! [[physical core|Cores]] !! [[logical core|Threads]] || [[technology node|Process ]] || L2$ || L3$ || [[tdp|TDP]]
  2 KB (278 words) - 12:33, 18 June 2021
• amd/phenom ii x2
  ! Model Number !! Arch !! Frequency !! [[physical core|Cores]] !! [[logical core|Threads]] || [[technology node|Process ]] || L2$ || L3$ || [[tdp|TDP]]
  3 KB (357 words) - 21:08, 18 June 2021
• amd/phenom ii x6
  ! Model Number !! Arch !! Frequency !! Turbo !! [[physical core|Cores ]] !! [[logical core|Threads]] || [[technology node|Process ]] || L2$ || L3$ || TDP || Intr
  2 KB (285 words) - 11:15, 18 June 2021
• intel/microarchitectures/gen9.5
  * Enhanced "14nm+" process (while CPU cores base frequency was increased, GPU speed remains unchanged) ...blocks have both read and write access to the URB, additionally the shader cores have write access to the URB.
  29 KB (3,752 words) - 13:14, 19 April 2023
• intel/microarchitectures/gen9
  ...blocks have both read and write access to the URB, additionally the shader cores have write access to the URB. ...le and double precision floating point operations, SIMD branch capability, logical operations, transcendental operations, and other miscellaneous operations.
  33 KB (4,255 words) - 17:41, 1 November 2018
• acpi/c-states
  ....e. states that shut down parts of the microprocessor when [[physical core|cores]] are not used. Modern [[microprocessors]] have several C-states representi ...ors - incorporating [[multi-core microprocessor|multiple]] [[physical core|cores]], [[caches]], and other components, there are multiple C-states depending
  4 KB (635 words) - 08:08, 11 November 2018
• ibm/microarchitectures/power9
  |cores=4 |cores 2=8
  14 KB (1,905 words) - 23:38, 22 May 2020
• physical core
  ...se microprocessor). A single physical core may correspond to one or more [[logical core]]s. ...ending on the workloads the microprocessor may shift workloads between the cores in order to deliver higher performance or high power efficiency.
  2 KB (294 words) - 01:39, 13 June 2018
• pezy/pezy-scx
  ...ng elements''' ('''PE'''). The PEs are designed to be very simple [[RISC]] cores that are confgured as [[MIMD]] although in principle each PE can run differ ...in each city. A fair amount of sacrifices were made in order to ensure the cores remain small enough so that a large amount of them can be packed into a sma
  6 KB (838 words) - 09:33, 9 May 2019
• samsung/microarchitectures/m3
  |cores=4 *** New fastpath logical shift of up to 3 places
  20 KB (3,149 words) - 10:44, 15 February 2020
• arm holdings/microarchitectures/cortex-a76
  |cores=1 |cores 2=2
  14 KB (2,183 words) - 17:15, 17 October 2020
• arm holdings/microarchitectures/cortex-a77
  |cores=1 |cores 2=2
  17 KB (2,555 words) - 06:08, 16 June 2023
• arm holdings/microarchitectures/cortex-a78
  |cores=1 |cores 2=2
  21 KB (3,067 words) - 09:25, 31 March 2022
• intel/configurable spatial accelerator
  ...erators are designed alongside a traditional [[x86]] core. This allows the cores maintain legacy support and handle additional tasks that might be easier on ...ady can exert backpressure on the network. In addition to forwarding flow, logical conjunction can allow backflow which can handle returning control data from
  14 KB (2,130 words) - 20:19, 2 October 2018
• intel/microarchitectures/sunny cove
  |cores=2 |cores 2=4
  34 KB (5,187 words) - 06:27, 17 February 2023

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