• mips/mips32 instruction set
  ...PS Technologies]] after its [[Wikipedia:demerger|demerger]] from [[Silicon Graphics]] in 1998. The MIPS32 instruction set was developed along side the {{mips|M ...blished in 1999 by [[MIPS Technologies]] by it has demerged from [[Silicon Graphics]] in 1998. MIPS32 is largely a superset of the {{mips|MIPS II}} ISA.
  18 KB (2,445 words) - 07:24, 9 November 2019
• intel/crystal well
  ...]]-equipped [[manufacturer::Intel]] [[Haswell]] microprocessors. The eDRAM silicon die is separate from the main [[Haswell]] die but is packaged together with * {{intel|Iris Pro Graphics 5200}}
  2 KB (371 words) - 01:53, 15 February 2017
• microprocessor
  * '''[[graphics processing unit]]''' ('''GPU''') - is a graphics microprocessor - a microprocessor that specializes in the creation and mani ...ing additional specialized processing operations, e.g. cryptography, math, graphics, string processing, or I/O interfacing. A [[coprocessor]] can act as an ext
  24 KB (3,399 words) - 10:39, 12 March 2025
• mosfet
  ...r]] (typically [[silicon]]) and utilizes an insulator (such as [[wikipedia:Silicon dioxide|SiO₂]]) between the gate and the body. Today, the MOSFET ...and the world economy, and being central to the [[digital revolution]], [[silicon age]] and [[information age]]. MOSFET scaling and miniaturization has been
  193 KB (26,852 words) - 18:51, 11 March 2025
• intel/microarchitectures/bonnell
  ...or models. Those relied on a number of external chipset chips for the I/O, graphics, and various other system features. ...for Bonnell-based Silverthorne's successor. Lincroft integrates on-die the graphics and memory controller. Lincroft effectively replaces the original Silvertho
  38 KB (5,483 words) - 19:04, 20 December 2025
• intel/microarchitectures/sandy bridge (client)
  ...h translation of "Gesher" with "Sandy" possible referring to the fact that silicon comes from sand. * Integrated Graphics
  84 KB (13,075 words) - 23:54, 28 December 2020
• intel/microarchitectures/skylake (client)
  ...e as {{\\|Haswell}}); 48 EUs for GT3, and up to 72 EUs on {{intel|Iris Pro Graphics}} ...Additionally, a large number of improvements were done to the [[integrated graphics]] and multimedia capabilities as well as a new set of security technologies
  80 KB (12,026 words) - 09:01, 30 November 2025
• intel/microarchitectures/kaby lake
  ! Core !! Abbrev !! Platform || Description !! Graphics !! Target | {{intel|Kaby Lake H|l=core}} || KBL-H || || High-performance Graphics || GT2/GT3 || Ultimate mobile performance, mobile workstations
  38 KB (5,440 words) - 13:56, 9 April 2025
• intel/microarchitectures/ice lake (client)
  ! Core !! Abbrev !! Description !! Graphics !! Target | {{intel|Ice Lake H|l=core}} || ICL-H || High-performance Graphics || || Ultimate mobile performance, mobile workstations
  23 KB (3,620 words) - 20:09, 13 May 2025
• intel/microarchitectures/coffee lake
  ! Core !! Abbrev !! Platform !! Description !! Graphics !! Target | {{intel|Coffee Lake H|l=core}} || CFL-H || || High-performance graphics || GT2 || Ultimate mobile performance, mobile workstations
  30 KB (4,197 words) - 09:23, 30 July 2024
• intel/microarchitectures/gen9.5
  ...9.5''' (''Generation 9.5'') is the [[microarchitecture]] for [[Intel]]'s [[graphics processing unit]] utilized by {{\\|Kaby Lake}}-based, {{\\|Coffee Lake}}-ba [[File:iris graphics logo.svg|right|200px]]
  29 KB (3,752 words) - 12:14, 19 April 2023
• intel/microarchitectures/gen9
  '''Gen9''' (''Generation 9'') is the [[microarchitecture]] for [[Intel]]'s [[graphics processing unit]] utilized by {{\\|Skylake}}-based microprocessors. Gen9 is [[File:iris graphics logo.svg|right|200px]][[File:iris pro graphics logo.svg|right|200px]]
  33 KB (4,255 words) - 16:41, 1 November 2018
• intel/core i7/i7-8700k
  ...GiB of dual-channel DDR4-2666 memory and incorporates Intel's {{intel|UHD Graphics 630}} IGP operating at 350 MHz with a burst frequency of 1.2 GHz. == Graphics ==
  7 KB (977 words) - 00:05, 22 July 2022
• intel/core i5/i5-8600k
  ...GiB of dual-channel DDR4-2666 memory and incorporates Intel's {{intel|UHD Graphics 630}} IGP operating at 350 MHz with a burst frequency of 1.15 GHz. == Graphics ==
  6 KB (907 words) - 08:45, 29 August 2018
• intel/core i3/i3-8350k
  ...hannel DDR4-2400 ECC memory. The i3-8350K incorporates Intel's {{intel|UHD Graphics 630}} [[IGP]] operating at 350 MHz with burst frequency of 1.15 GHz. == Graphics ==
  5 KB (783 words) - 12:50, 23 November 2019
• microsoft/scorpio engine
  .../s. The bandwidth increase has effectively reached the level of a discrete graphics card and almost 1.5x the bandwidth of the PS4 Pro (which is 203 GiB/s). == Graphics ==
  15 KB (2,392 words) - 21:45, 23 March 2025
• accelerator
  ...ked renewed interest in accelerators. Accelerators can be implemented in [[silicon]], as in the case of [[ASICs]], or as [[soft hardware]]. Because this is ha ** '''[[Graphics accelerator]]''' - accelerators used for the manipulation and creation of i
  4 KB (539 words) - 18:47, 2 April 2019
• high-bandwidth memory
  ...cessor|high-end graphics]] and networking (e.g., 100G+ [[Ethernet]], TB+ [[silicon photonics]]), and [[high-performance computing]]. Unfortunately, over the l High-bandwidth memory leverages [[through-silicon vias]] (TSVs) to overcome some of the limitations found in traditional [[me
  2 KB (267 words) - 23:23, 8 January 2021
• nvidia/tegra/xavier
  ...omous machine processor designed by [[Nvidia]] and introduced at CES 2018. Silicon came back in the last week of December 2017 with sampling started in the fi ...ink]] 1.0 supporting 20 GB/s in each direction for connecting a [[discrete graphics processor]] to Xavier in a [[cache coherent]] manner. Xavier has PCIe Gen 4
  8 KB (1,266 words) - 09:04, 17 March 2025
• movidius/myriad/ma1110
  [[File:movidius ma1000 silicon platform.png|600px]] ** Video support for 4 layers of video and graphics
  2 KB (235 words) - 14:36, 11 March 2018

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