• mirc/msl injection
  ...ou to manage the list of the only filetypes which are accepted. You should block all executable filetypes, without expecting to be able to inspect the downl write getlog.txt $time(yyyy.mm.dd HH:nn:ss) $network $nick $get(-1).ip $address($nick,5) $get(-1).size file: $filename
  26 KB (4,222 words) - 08:43, 21 January 2023
• nec/μcom-4/isa
  == Block diagram == | IP || 32 || 1 || 1 || A_CC ← PORT[DP_L] || ||
  7 KB (889 words) - 13:27, 29 October 2023
• intel/microarchitectures/ice lake (client)
  === Block Diagram === [[File:ice lake soc block diagram.svg|900px]]
  23 KB (3,613 words) - 12:31, 20 June 2021
• intrinsity/fast14
  ...o implement some well known models, including [[ARM]]'s {{\|Cortex-R4X}} [[IP Core]], Samsung's {{samsung|Hummingbird}}'s, and Intrinsity's own {{\|FastM * Build₁₄ - Block Build Environment - block building tool for generating custom NDL blocks automatically.
  2 KB (228 words) - 18:05, 2 July 2016
• arm holdings/microarchitectures/cortex-a53
  Note that this microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  6 KB (758 words) - 13:01, 6 March 2022
• arm holdings/microarchitectures/cortex-a75
  ...the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  2 KB (277 words) - 23:03, 23 March 2020
• amd/infinity fabric
  ...hings such as thermal and power management, tests, security, and 3rd party IP. With those two planes, AMD can efficiently scale up many of the basic comp [[File:amd zeppelin sdf plane block.svg|class=wikichip_ogimage|400px|right]]
  8 KB (1,271 words) - 21:50, 18 August 2020
• intel/microarchitectures/skylake (server)
  === Block Diagram === :[[File:skylake sp lcc block diagram.svg|500px]]
  52 KB (7,651 words) - 00:59, 6 July 2022
• arm holdings/microarchitectures/arm7
  ...ldings]] for the mobile market. This microarchitecture is designed as an [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  3 KB (293 words) - 05:02, 31 December 2018
• chiplet
  ...ctional circuit blocks, called "chiplets", that are often made of reusable IP blocks.
  4 KB (612 words) - 13:40, 28 February 2021
• esperanto/microarchitectures/et-minion
  ...ecture designed by [[Esperanto]]. ET-Minion is also sold as a licensable [[IP core]]. === Block Diagram ===
  1 KB (150 words) - 04:58, 9 February 2018
• esperanto/microarchitectures/et-maxion
  ...ecture designed by [[Esperanto]]. ET-Maxion is also sold as a licensable [[IP core]]. === Block Diagram ===
  997 bytes (119 words) - 04:58, 9 February 2018
• zhaoxin/microarchitectures/wudaokou
  === Block Diagram === :[[File:wudaokou soc block diagram.svg|550px]]
  9 KB (1,134 words) - 13:02, 17 June 2019
• samsung/microarchitectures/m1
  === Block Diagram === [[File:mongoose 1 soc block diagram.svg|500px]]
  13 KB (1,962 words) - 14:48, 21 February 2019
• intel/mesh interconnect architecture
  * '''Tile''' - a modular [[IP block]] that can be replicated multiple times across a large grid ...le depends on the design goals and target market. In theory any type of IP block can serve as a tile provided it's modified to interface with the CMS. Each
  7 KB (1,071 words) - 12:59, 2 November 2021
• arm holdings/microarchitectures/neoverse n1
  ...the server market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  7 KB (980 words) - 13:46, 18 February 2023
• arm holdings/microarchitectures/cortex-a76
  ...ustin, Texas team. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  14 KB (2,183 words) - 17:15, 17 October 2020
• arm holdings/microarchitectures/cortex-a77
  ...ustin, Texas team. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  17 KB (2,555 words) - 06:08, 16 June 2023
• arm holdings/microarchitectures/cortex-a78
  ...ustin, Texas team. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in th === Block Diagram ===
  21 KB (3,067 words) - 09:25, 31 March 2022
• sifive/microarchitectures/7 series
  '''7 Series''' is a series of high-performance [[RISC-V]] [[IP cores]] designed by [[SiFive]]. === Block Diagram ===
  4 KB (625 words) - 09:16, 28 November 2018

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