From WikiChip
Kirin 990 5G - HiSilicon

Edit Values
Kirin 990 5G
General Info
DesignerHiSilicon,
ARM Holdings
ManufacturerTSMC
Model Number990 5G
MarketMobile
IntroductionSeptember 6, 2019 (announced)
September 6, 2019 (launched)
General Specs
FamilyKirin
Frequency2,860 MHz, 2,360 MHz, 1,950 MHz
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureCortex-A76, Cortex-A55
Core NameCortex-A76, Cortex-A55
Process7 nm+ EUV
Transistors10,300,000,000
TechnologyCMOS
Die100.00mm²
Word Size64 bit
Cores8
Threads8

Kirin 990 5G is a 64-bit high-performance mobile ARM 5G SoC designed by HiSilicon, introduced on September 6th 2019, first appearing in the Huawei Mate 30 Pro. Fabricated on TSMC's enhanced 7nm+ EUV process, the 990 5G incorporates two high frequency Cortex-A76 cores operating at 2.86 GHz along with two medium frequency Cortex-A76 cores operating at 2.36 GHz along with four Cortex-A55 cores operating at up to 1.95 GHz.

The 5G model of the Kirin 990 is one of the first SoC that fully integrates a 5G modem (Balong 5000) in the same silicon as the CPU and the GPU. The Kirin 990 5G includes a limited version of the Balong 5000 modem that supports Sub-6-GHz frequency but no mmWave (commonly used in the USA).

There will be a Kirin 990 4G Version, including the Balong 765 with 4G LTE (3GPP Rel. 14) in the SoC.

The Kirin 990 5G supports up to 2.3 Gbps download and up to 1.25 Gbps upload speed and supports LPDDR4X-4266 memory.

Overview[edit]

Introduced at the 2019 IFA, the Kirin 990 uses the same ARM cortex (Cortex A76 + Cortex A55) versions as its predecessor, the Kirin 980, but the clock frequencies have been increased thanks to TSMC's more advanced manufacturing method, the 7nm+ EUV node: The 990 features two high-performance big Cortex-A76 core operating at 2.86 GHz, 2 medium-performance big Cortex-A76 operating at 2.36 GHz, and four little Cortex-A55 cores operating at 1.95 GHz. Compared to the 980, the 990 5G features between 10% - 35% power efficiency due to the 2nd generation of 7nm process node. The 990 ballooned to over 50% more transistors from 6.9 billion in the 980 to 10.3 billion. The 990 incorporates an in-house developed DaVinci NPU dual-neural processor designed for AI acceleration.

Cache[edit]

Main articles: Cortex-A55 § Cache and Cortex-A76 § Cache


For the Cortex-A76:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
L1I$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
4x64 KiB  
L1D$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
4x64 KiB  

L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  4x512 KiB  

For the Cortex-A55:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
L1I$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB  
L1D$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB  

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  4x128 KiB  


Memory controller[edit]

The Kirin 990 supports 4-channel LPDDR4X up to 4266 MHz. Each channel supports at most two ranks.

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4X-4266
Supports ECCNo
Max Mem8 GiB
Controllers1
Channels4
Width16 bit
Max Bandwidth31.78 GiB/s
55.297 GB/s
32,542.72 MiB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Double 15.89 GiB/s
Quad 31.78 GiB/s

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-G76
DesignerARM Holdings
Execution Units16Max Displays2
Frequency750 MHz
0.75 GHz
750,000 KHz
OutputDSI

Standards
DirectX12
OpenCL1.2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0

Wireless[edit]

  • 5G NR Modem
    • DL: Up to User Equipment (UE) category 21
      • Downlink of up to 1.4 Gbps (4x4 MIMO + 256QAM 3CC CA = 1.2 Gbps, 2x2 MIMO + 256QAM + 1CC = 200 Mbps)
    • UL: Up to User Equipment (UE) category 18
      • Uplink of up to 200 Mbps (2x2 MIMO, 256-QAM, 1x20MHz CA)
  • Wi-Fi 802.11 ac
  • Bluetooth 5
  • NFC
  • GPS / A-GPS / GLONASS / BDS

Utilizing devices[edit]

  • Huawei Mate 30 Pro

Bibliography[edit]

  • Huawei Kirin 990 Keynote, 2019 IFA
base frequency2,860 MHz (2.86 GHz, 2,860,000 kHz) +, 2,360 MHz (2.36 GHz, 2,360,000 kHz) + and 1,950 MHz (1.95 GHz, 1,950,000 kHz) +
core count8 +
core nameCortex-A76 + and Cortex-A55 +
designerHiSilicon + and ARM Holdings +
die area100 mm² (0.155 in², 1 cm², 100,000,000 µm²) +
familyKirin +
first announcedSeptember 6, 2019 +
first launchedSeptember 6, 2019 +
full page nameKirin 990 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuMali-G76 +
integrated gpu base frequency750 MHz (0.75 GHz, 750,000 KHz) +
integrated gpu designerARM Holdings +
isaARMv8 +
isa familyARM +
l1$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + and 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1d$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + and 0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1i$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + and 0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldate3000 +
manufacturerTSMC +
market segmentMobile +
max memory bandwidth31.78 GiB/s (55.297 GB/s, 32,542.72 MiB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels4 +
microarchitectureCortex-A76 + and Cortex-A55 +
model number990 5G +
nameKirin 990 5G +
supported memory typeLPDDR4X-4266 +
technologyCMOS +
thread count8 +
transistor count10,300,000,000 +
used byHuawei Mate 30 Pro +
word size64 bit (8 octets, 16 nibbles) +