Core i5-6500TE - Intel

	Edit Values
	Core i5-6500TE
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i5-6500TE
S-Spec	SR2LR
Market	Embedded
Introduction	October 19, 2015 (announced); October 19, 2015 (launched)
Release Price	$192.00
Shop	Amazon
	General Specs
Family	Core i5
Series	i5-6000
Locked	Yes
Frequency	2,300 MHz
Turbo Frequency	3,300 MHz (1 core),; 3,200 MHz (2 cores),; 3,100 MHz (3 cores),; 3,000 MHz (4 cores)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	23
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Skylake
Chipset	Sunrise Point
Core Name	Skylake S
Core Family	6
Core Model	94
Core Stepping	R0
Process	14 nm
Technology	CMOS
Die	122 mm²
Word Size	64 bit
Cores	4
Threads	4
Max Memory	64 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Vcore	0.55 V-1.52 V
TDP	35 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
Dimension	37.5 mm x 37.5 mm x 4.4 mm
Pitch	0.914 mm
Contacts	1151
Socket	LGA-1151

Core i5-6500TE is a quad-core 64-bit x86 mid-range performance embedded desktop microprocessor introduced by Intel in late 2015. This processor, which is based on the Skylake microarchitecture and is fabricated on a 14 nm process, has a base frequency of 2.3 GHz and a turbo boost of up 3.3 GHz with a TDP of 35 W. The i5-6500TE incorporates the HD Graphics 530 IGP operating at 350 MHz and a turbo frequency of 1 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 memory.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

256 KiB

262,144 B
0.25 MiB

L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB	8-way set associative
L1D$	128 KiB 131,072 B 0.125 MiB	4x32 KiB	8-way set associative	write-back

L2$

1 MiB

1,024 KiB
1,048,576 B
9.765625e-4 GiB

		4x256 KiB	4-way set associative	write-back

L3$

6 MiB

6,144 KiB
6,291,456 B
0.00586 GiB

		4x1.5 MiB		write-back

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR3L-1600, DDR4-2133
Supports ECC	No
Max Mem	64 GiB
Controllers	1
Channels	2
Max Bandwidth	31.79 GiB/s 32,552.96 MiB/s 34.134 GB/s 34,134.253 MB/s 0.031 TiB/s 0.0341 TB/s
Bandwidth	Single 15.89 GiB/s Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	3.0
Max Lanes	16
Configs	1x16, 2x8, 1x8+2x4

Graphics[edit]

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

HD Graphics 530

Designer

Intel

Device ID

0x1912

Execution Units

24

Max Displays

3

Max Memory

64 GiB

65,536 MiB
67,108,864 KiB
68,719,476,736 B

Frequency

350 MHz

0.35 GHz
350,000 KHz

Burst Frequency

1,000 MHz

1 GHz
1,000,000 KHz

Output

DP, eDP, HDMI, DVI

Max Resolution

HDMI	4096x2304 @24 Hz
DP	4096x2304 @60 Hz
eDP	4096x2304 @60 Hz

Standards

DirectX	12
OpenGL	4.4
OpenCL	2.0
DP	1.2
eDP	1.3
HDMI	1.4a

Additional Features

Intel Quick Sync Video

Intel InTru 3D

Intel Clear Video

Intel Clear Video HD

[Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	Main	High	1080p (FHD)	Main	Main, High	1080p (FHD)
MPEG-4 AVC (H.264)	High, Main	5.1	2160p (4K)	Main, High, SHP, MHP	5.1	2160p (4K)
JPEG/MJPEG	Baseline	-	16k x 16k	Baseline	Unified	16k x 16k
HEVC (H.265)	Main	5.1	2160p (4K)	Main, Main 10	5.1	2160p (4K)
VC-1	✘			Advanced, Main, Simple	3, High	3840x3840
VP8	Unified	Unified	-	0	Unified	1080p
VP9	✘			0	Unified	2160p (4K)

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
TBT 2.0	Turbo Boost Technology 2.0
EIST	Enhanced SpeedStep Technology
TXT	Trusted Execution Technology (SMX)
vPro	Intel vPro
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions
MPX	Memory Protection Extensions
SGX	Software Guard Extensions
Secure Key	Secure Key Technology
SMEP	OS Guard Technology
SIPP	Stable Image Platform Program
IPT	Identity Protection Technology

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i5-6500TE - Intel#package + and Core i5-6500TE - Intel#io +
base frequency	2,300 MHz (2.3 GHz, 2,300,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Sunrise Point +
clock multiplier	23 +
core count	4 +
core family	6 +
core model	94 +
core name	Skylake S +
core stepping	R0 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x1912 +
die area	122 mm² (0.189 in², 1.22 cm², 122,000,000 µm²) +
family	Core i5 +
first announced	October 19, 2015 +
first launched	October 19, 2015 +
full page name	intel/core i5/i5-6500te +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, Turbo Boost Technology 2.0 +, Trusted Execution Technology +, Intel vPro Technology +, Transactional Synchronization Extensions +, OS Guard +, Stable Image Platform Program +, Identity Protection Technology +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions +
has intel enhanced speedstep technology	true +
has intel identity protection technology support	true +
has intel secure key technology	true +
has intel stable image platform program support	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 530 +
integrated gpu base frequency	350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	24 +
integrated gpu max frequency	1,000 MHz (1 GHz, 1,000,000 KHz) +
integrated gpu max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	4-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size	6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
ldate	October 19, 2015 +
main image	+
manufacturer	Intel +
market segment	Embedded +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i5-6500TE +
name	Core i5-6500TE +
package	FCLGA-1151 +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 192.00 (€ 172.80, £ 155.52, ¥ 19,839.36) +
s-spec	SR2LR +
series	i5-6000 +
smp max ways	1 +
socket	LGA-1151 +
supported memory type	DDR3L-1600 + and DDR4-2133 +
tdp	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technology	CMOS +
thread count	4 +
turbo frequency (1 core)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (2 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (3 cores)	3,100 MHz (3.1 GHz, 3,100,000 kHz) +
turbo frequency (4 cores)	3,000 MHz (3 GHz, 3,000,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Contents

Cache[edit]

Memory controller[edit]

Expansions[edit]

Graphics[edit]

Features[edit]