Edit Values
Alpha 21264 µarch
General Info
Arch Type	CPU
Designer	DEC
Manufacturer	DEC, Intel, Samsung
Introduction	February, 1998
Process	0.35 µm
Core Configs	1
Pipeline
Type	Superscalar
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	6
Decode	4-way
Instructions
ISA	Alpha
Cache
L1I Cache	64 KiB/core 2-way set associative
L1D Cache	64 KiB/core 2-way set associative
Succession
Alpha 21164 Alpha 21364

Alpha 21264 was an Alpha microarchitecture designed by DEC and introduced in 1998 by Compaq as a successor to the Alpha 21164 architecture.

History

This section is empty; you can help add the missing info by editing this page.

Process Technology

See also: 0.35 µm process

Alpha 21264 was manufactured on a 0.35 µm process at DEC's own Hudson foundry. The process had a 0.35 µm drawn gate length and 0.25 µm effective channel length. The CMOS process had 3 metal layers. The chip allowed for a supply voltage of up to 2 V in order to limit the chips to a power limit of 72 W, although it was actually designed to reliably operate at up to 2.5 V.

Architecture

This section is empty; you can help add the missing info by editing this page.

• Integrated PLL (designed by CSEM)

Die

• 15,200,000 transistors
  • 9,200,000 cache
  • 6,000,000 logic
• 0.35 µm 4 metal layers
• 16.7 mm x 18.8 mm
• 313.96 mm² die size
• PGA-587 package
  • 389 signal pins

All Alpha 21264 chips

This section is empty; you can help add the missing info by editing this page.

References

• Dobberpuhl, Daniel W. "Circuits and technology for Digital's StrongARM and ALPHA microprocessors [CMOS technology]." Advanced Research in VLSI, 1997. Proceedings., Seventeenth Conference on. IEEE, 1997.