ARM ISA

General

History Families

Variants

26-bit 32-bit 64-bit

Extensions

ARM Thumb ThumbEE Jazelle VFP Neon Helium

Topics

Addressing Modes Registers Assembly Interrupts CPSR Modes Calling Convention Microarchitectures

Versions(all)

ARMv1 ARMv2 ARMv2a ARMv3 ARMv4 ARMv5 ARMv6 ARMv7 ARMv8 ARMv8.1 ARMv8.2 ARMv8.3

ARMv2 is the second ARM instruction set version which was introduced by Acorn with the release of the ARM2 in 1986. The ARMv2 was the first instruction set to be used commercially.

Overview

The ARMv2 is the second iteration of the ARM instruction set which was introduced with Acorn's ARM2 in 1986. The ARMv2 added support for multiplication and a coprocessor communication interface. It also adds two additional status registers for a total of 27 registers.

New Instructions

ARMv2 adds a number of new instructions:

• Movement Instructions
• Load Instructions
• Store Instructions
• Arithmetic Instructions
• Coprocessor Instructions

New ARMv2 ISA Instructions
Mnemonic	Syntax	Description	Action
Movement Instructions Movement instructions move data between registers and operands.
MCR	MCR<cond> <copro>, <op1>, Rd, Cn, Cm {, <op2>}	Move to Coprocessor register	Coprocessor <copro> = Rd
MRC	MRC<cond> <copro>, <op1>, Rd, Cn, Cm , <op2>	Move register from a Coprocessor	Rd = Coprocessor <copro>
Load Instructions Load instructions move the content of memory addresses into registers.
LDC	LDC<cond>{L} <copro>, Cd, [Rn {, #imm * 4}]{!}	Load to Coprocessor	Coprocessor <copro> = [Rn + imm] If !: Rn = Rn + imm
LDC	LDC<cond>{L} <copro>, Cd, [Rn], #{-}<immed8> * 4	Load to Coprocessor	Coprocessor <copro> = [Rn + imm] Rn = Rn + imm
LDC	LDC<cond>{L} <copro>, Cd, [Rn], <option>	Load to Coprocessor	Coprocessor <copro> = [Rn]
Store Instructions Store instructions moves the values from registers into memory.
STC	STC<cond>{L} <copro>, Cd, [Rn {, #imm * 4}]{!}	Store from Coprocessor	[Rn + imm] = Coprocessor <copro> If !: Rn = Rn + imm
STC	STC<cond>{L} <copro>, Cd, [Rn], #{-}<immed8> * 4	Store from Coprocessor	[Rn + imm] = Coprocessor <copro> Rn = Rn + imm
STC	STC<cond>{L} <copro>, Cd, [Rn], <option>	Store from Coprocessor	[Rn] = Coprocessor <copro>
Coprocessor Instructions Operates on a Coprocessor.
CDP	CDP<cond> <copro>, <op1>, Cd, Cn, Cm, <op2>	Coprocessor Data Process	Execut OP Given on Coprocessor <copro>
Arithmetic Instructions Arithmetic instructions perform basic mathematical operations on two operands.
MLA	MLA<cond>{S} Rd, Rm, Rs, Rn	Multiply and accumulate	Rd = (Rm * Rs) + Rn
MUL	MUL<cond>{S} Rd, Rm, Rs	Multiply	Rd = Rm * Rs