Edit Values | |
Kirin 990 4G | |
General Info | |
Designer | HiSilicon, ARM Holdings |
Manufacturer | TSMC |
Model Number | 990 4G |
Market | Mobile |
Introduction | September 6, 2019 (announced) September 6, 2019 (launched) |
General Specs | |
Family | Kirin |
Series | 900 |
Frequency | 2,860 MHz, 2,088 MHz, 1,860 MHz |
Microarchitecture | |
ISA | ARMv8 (ARM) |
Microarchitecture | Cortex-A76, Cortex-A55 |
Core Name | Cortex-A76, Cortex-A55 |
Process | 7 nm |
Transistors | 8,000,000,000 |
Technology | CMOS |
Die | 90.00mm² |
Word Size | 64 bit |
Cores | 8 |
Threads | 8 |
Kirin 990 4G is a 64-bit high-performance mobile ARM LTE SoC designed by HiSilicon and introduced in late 2019. Fabricated on TSMC's 7 nm process, the 990 4G incorporates two high frequency Cortex-A76 cores operating at 2.86 GHz along with two medium frequency Cortex-A76 cores operating at 2.09 GHz along with four Cortex-A55 cores operating at up to 1.86 GHz.
This SoC has an integrated LTE modem Balong 765 supporting 1.6 Gbps download (Cat21), incorporates an ARM Mali-G76, and supports LPDDR4X-4266 memory.
Contents
Overview[edit]
Introduced at the 2019 IFA, the Kirin 990 4G uses the same ARM cortex (Cortex A76 + Cortex A55) versions as its predecessor, the Kirin 980, but the clock frequencies have been increased: The Kirin 990 4G features two high-performance big Cortex-A76 core operating at 2.86 GHz, 2 medium-performance big Cortex-A76 operating at 2.09 GHz, and four little Cortex-A55 cores operating at 1.86 GHz. The Kirin 990 4G has approximately 8.0 billion transistors, compared to 6.9 billions transistors of his precedessor, the Kirin 980, that has been produced in the same 7nm process node at TSMC in Taiwan. The Kirin 990 4G incorporates an in-house developed NPU dual-neural processor "DaVinci" designed for AI acceleration.
Cache[edit]
- Main articles: Cortex-A55 § Cache and Cortex-A76 § Cache
For the Cortex-A76:
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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For the Cortex-A55:
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
The Kirin 990 4G supports 4-channel LPDDR4X up to 4266 MHz. Each channel supports at most two ranks.
Integrated Memory Controller
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Graphics[edit]
Integrated Graphics Information
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Wireless[edit]
- LTE Modem
- DL: Up to User Equipment (UE) category 21
- Downlink of up to 1.6 Gbps (4x4 MIMO + 256QAM 3CC CA = 1.6 Gbps, 2x2 MIMO + 256QAM + 1CC = 200 Mbps)
- UL: Up to User Equipment (UE) category 19
- Uplink of up to 200 Mbps (2x2 MIMO, 256-QAM, 1x20MHz CA)
- DL: Up to User Equipment (UE) category 21
- Wi-Fi 802.11 ac
- Bluetooth 5
- NFC
- GPS / A-GPS / GLONASS / BDS
Utilizing devices[edit]
- Huawei Mate 30
- Huawei Mate 30 Pro
- Huawei P40 4G
- Huawei Nova 6
- Huawei Nova 6 5G
- Honor V30
- Honor Play4 Pro
- Huawei MatePad Pro (WiFi/4G) (2019-2020
Bibliography[edit]
- Huawei Kirin 990 Keynote, 2019 IFA
- all microprocessor models
- microprocessor models by hisilicon
- microprocessor models by hisilicon based on cortex-a76
- microprocessor models by hisilicon based on cortex-a55
- microprocessor models by arm holdings
- microprocessor models by arm holdings based on cortex-a76
- microprocessor models by arm holdings based on cortex-a55
- microprocessor models by tsmc
- future microprocessor models
base frequency | 2,860 MHz (2.86 GHz, 2,860,000 kHz) +, 2,088 MHz (2.088 GHz, 2,088,000 kHz) + and 1,860 MHz (1.86 GHz, 1,860,000 kHz) + |
core count | 8 + |
core name | Cortex-A76 + and Cortex-A55 + |
designer | HiSilicon + and ARM Holdings + |
die area | 90 mm² (0.14 in², 0.9 cm², 90,000,000 µm²) + |
family | Kirin + |
first announced | September 6, 2019 + |
first launched | September 6, 2019 + |
full page name | Kirin 990 4G + |
has ecc memory support | false + |
instance of | microprocessor + |
integrated gpu | Mali-G76 + |
integrated gpu base frequency | 600 MHz (0.6 GHz, 600,000 KHz) + |
integrated gpu designer | ARM Holdings + |
integrated gpu execution units | 16 + |
isa | ARMv8 + |
isa family | ARM + |
l1$ size | 512 KiB (524,288 B, 0.5 MiB) + and 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + and 128 KiB (131,072 B, 0.125 MiB) + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | 3000 + |
manufacturer | TSMC + |
market segment | Mobile + |
max memory bandwidth | 31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 4 + |
microarchitecture | Cortex-A76 + and Cortex-A55 + |
model number | 990 4G + |
name | Kirin 990 4G + |
process | 7 nm (0.007 μm, 7.0e-6 mm) + |
series | 900 + |
supported memory type | LPDDR4X-4266 + |
technology | CMOS + |
thread count | 8 + |
transistor count | 8,000,000,000 + |
used by | Huawei Mate 30 +, Huawei Mate 30 Pro +, Huawei P40 4G +, Huawei Nova 6 +, Huawei Nova 6 5G +, Honor V30 +, Honor Play4 Pro + and Huawei MatePad Pro (WiFi/4G) (2019-2020 + |
word size | 64 bit (8 octets, 16 nibbles) + |