From WikiChip
Godson-2H - Loongson
Edit Values | |
Godson-2H | |
Godson-2H chip | |
General Info | |
Designer | Loongson |
Manufacturer | STMicroelectronics |
Model Number | 2H |
Market | Desktop |
Introduction | August, 2010 (announced) March, 2011 (launched) |
General Specs | |
Family | Godson 2 |
Series | Godson 2 |
Frequency | 1,000 MHz |
Bus type | HyperTransport 1.03 |
Bus speed | 800 MHz |
Microarchitecture | |
ISA | MIPS64 (MIPS) |
Microarchitecture | GS464V |
Core Name | GS464V |
Process | 65 nm |
Transistors | 152,000,000 |
Technology | CMOS |
Die | 117 mm² |
Word Size | 64 bit |
Cores | 1 |
Threads | 1 |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 10 W |
Godson-2H (龙芯2H) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late-2010, the Godson-2H operates at up to 1 GHz consuming up to 10 W. This chip was manufactured on STMicroelectronics' 65 nm process.
The Godson-2H is actually a complete system on a chip incorporating the northbridge along with the southbridge on-die. Additionally the Godson-2H also incorporates a low-power Vivante GC800 IGP operating at 400 MHz.
In addition to a standalone SoC, the Godson-2H can also operate in slave-mode serving as a cooperative southbridge to the more powerful Godson 3 multi-core processor family.
Cache[edit]
- Main article: GS464V § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Graphics[edit]
Integrated Graphics Information
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Expansions[edit]
This chip has integrated HyperTransport 1.03 operating at 200, 400, or 800 MHz.
Expansion Options
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Networking[edit]
Networking
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Die Shot[edit]
- 65 nm process
- 152,000,000 transistors
- 117 mm² die size
References[edit]
- Xiao, Bin, et al. "Godson-2H: a complex low power SOC in 65nm CMOS." Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on. IEEE, 2012.
- Loongson Technology, "龙芯芯片产品技术白皮书" ("Godson chip product technology white paper")
Facts about "Godson-2H - Loongson"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Godson-2H - Loongson#io + |
base frequency | 1,000 MHz (1 GHz, 1,000,000 kHz) + |
bus speed | 800 MHz (0.8 GHz, 800,000 kHz) + |
bus type | HyperTransport 1.03 + |
core count | 1 + |
core name | GS464V + |
designer | Loongson + |
die area | 117 mm² (0.181 in², 1.17 cm², 117,000,000 µm²) + |
family | Godson 2 + |
first announced | August 2010 + |
first launched | March 2011 + |
full page name | loongson/godson 2/2h + |
has ecc memory support | true + |
instance of | microprocessor + |
integrated gpu | GC800 + |
integrated gpu base frequency | 400 MHz (0.4 GHz, 400,000 KHz) + |
integrated gpu designer | Vivante + |
integrated gpu execution units | 4 + |
isa | MIPS64 + |
isa family | MIPS + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | March 2011 + |
main image | + |
main image caption | Godson-2H chip + |
manufacturer | STMicroelectronics + |
market segment | Desktop + |
max cpu count | 1 + |
max memory bandwidth | 11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) + |
max memory channels | 1 + |
max pcie lanes | 4 + |
microarchitecture | GS464V + |
model number | 2H + |
name | Godson-2H + |
power dissipation | 10 W (10,000 mW, 0.0134 hp, 0.01 kW) + |
process | 65 nm (0.065 μm, 6.5e-5 mm) + |
series | Godson 2 + |
smp max ways | 1 + |
supported memory type | DDR3-800 + |
technology | CMOS + |
thread count | 1 + |
transistor count | 152,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |