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Difference between revisions of "single diffusion break"

(Overview)
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==Overview==
 
==Overview==
Double [[diffusion break]] (DDB) isolation has historically been used to isolate neighboring devices in order to provide good process control and reduce [[process variability|variations]]. With advancements in [[DTCO]], advanced [[process nodes]] reduced [[cell height]], thereby increasing the share of wasted space due to cell-to-cell spacings as a result of DDB. Single diffusion break reduces the cell-to-cell spacing by reducing the width of the [[shallow trench isolation]] to a single poly gate length.
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Double [[diffusion break]] (DDB) isolation has historically been used to isolate neighboring devices in order to provide good process control (stress) and reduce [[process variability|variations]]. With advancements in [[DTCO]], advanced [[process nodes]] reduced [[cell height]], thereby increasing the share of wasted space due to cell-to-cell spacings as a result of DDB. Single diffusion break reduces the cell-to-cell spacing by reducing the width of the [[shallow trench isolation]] to a single dummy [[poly gate]] [[gate length|length]]. In practice, there is no actual dummy gate. Instead, just the trench isolation remains.
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:[[File:ttt-cell-scaling-sdb.svg|800px]]
  
 
==Industry==
 
==Industry==

Revision as of 00:25, 21 June 2022

Single Diffusion Break (SDB) or Single Dummy Gate (SDG) is a semiconductor process flow technique that eliminates the need for an additional dummy gate padding at the cell boundaries. SDB is used to enable aggressive scaling of abutting cells without affecting the cell height or underlying devices.

Overview

Double diffusion break (DDB) isolation has historically been used to isolate neighboring devices in order to provide good process control (stress) and reduce variations. With advancements in DTCO, advanced process nodes reduced cell height, thereby increasing the share of wasted space due to cell-to-cell spacings as a result of DDB. Single diffusion break reduces the cell-to-cell spacing by reducing the width of the shallow trench isolation to a single dummy poly gate length. In practice, there is no actual dummy gate. Instead, just the trench isolation remains.

ttt-cell-scaling-sdb.svg

Industry

Samsung

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Intel

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See also

Bibliography

  • Intel, 2017 IEEE 63rd International Electron Devices Meeting (IEDM).