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R-Car H3 (SiP) - Renesas
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Revision as of 03:26, 23 July 2017 by BCD (talk | contribs)

Template:mpu R-Car H3 is a 64-bit nona-core ARM SoC designed by Renesas for the automotive industry and introduced in 2016. The H3 incorporates four Cortex-A57 cores, four Cortex-A53 cores, and a single Cortex-R7 core for real-time processing. This chip supports up to quad-channel LPDDR4-3200 memory.

This model is an SiP variant of the H3 which include the DDR memory on-package.